diff --git a/CMakeLists.txt b/CMakeLists.txt index c60be1d5c..8348ec382 100755 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -21,7 +21,9 @@ set(CMAKE_CXX_STANDARD 20) set(CMAKE_VERBOSE_MAKEFILE OFF) set(CMAKE_EXPORT_COMPILE_COMMANDS ON) set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/lib) -set(CMAKE_CXX_FLAGS_RELEASE "$ENV{CXXFLAGS} -O3 -Wall -Werror=return-type") +set(CMAKE_C_FLAGS_RELEASE "$ENV{CFLAGS} -O1 -Wall -DNDEBUG") +set(CMAKE_CXX_FLAGS_RELEASE "$ENV{CXXFLAGS} -O1 -Wall -Werror=return-type -DNDEBUG") +set(CMAKE_C_FLAGS_DEBUG "$ENV{CFLAGS} -O0 -Wall -g2 -ggdb") set(CMAKE_CXX_FLAGS_DEBUG "$ENV{CXXFLAGS} -O0 -Wall -g2 -ggdb -Werror=return-type") if(NOT DEFINED CMAKE_BUILD_TYPE OR CMAKE_BUILD_TYPE STREQUAL "") @@ -40,6 +42,7 @@ option(SANITIZER "Enable address sanitizer (default OFF)" OFF) option(BUILD_GUI "Enable GUI components (default OFF)" OFF) option(USE_GPU "Enable GPU acceleration (default OFF)" OFF) option(ENABLE_AI "Enable AI modules (default OFF)" OFF) +option(BUILD_NOTIFICATION "Enable notification subsystem (default ON)" ON) option(COMPATIBILITY_MODE "Enable compatibility mode (disable aggressive optimizations)" ON) # Define GLOG_USE_GLOG_EXPORT for glog 0.7.1+ compatibility diff --git a/src/interface/tcl/CMakeLists.txt b/src/interface/tcl/CMakeLists.txt index 78925efba..47e4e6645 100644 --- a/src/interface/tcl/CMakeLists.txt +++ b/src/interface/tcl/CMakeLists.txt @@ -22,7 +22,9 @@ add_subdirectory(tcl_feature) add_subdirectory(tcl_eval) add_subdirectory(tcl_eco) add_subdirectory(tcl_vec) -add_subdirectory(tcl_notification) +if(BUILD_NOTIFICATION) + add_subdirectory(tcl_notification) +endif() if(CONTEST) add_subdirectory(tcl_contest) @@ -58,7 +60,6 @@ target_link_libraries(ieda_tcl tcl_eco tcl_vec tcl_ipnp - tcl_notification ) target_include_directories(ieda_tcl @@ -74,6 +75,10 @@ target_include_directories(ieda_tcl ${HOME_PLATFORM}/tool_manager/tool_api ) +if(BUILD_NOTIFICATION) + target_link_libraries(ieda_tcl PUBLIC tcl_notification) +endif() + if(BUILD_GUI) target_link_libraries(ieda_tcl PUBLIC tcl_gui) diff --git a/src/interface/tcl/tcl_register.h b/src/interface/tcl/tcl_register.h index 6f5adebea..d5bded4cb 100644 --- a/src/interface/tcl/tcl_register.h +++ b/src/interface/tcl/tcl_register.h @@ -51,7 +51,9 @@ #include "tcl_register_to.h" #include "tcl_register_vec.h" #include "tcl_register_pnp.h" +#ifdef BUILD_NOTIFICATION #include "tcl_register_notification.h" +#endif #ifdef CONTEST #include "tcl_register_contest.h" @@ -121,8 +123,10 @@ int registerCommands() /// PNP registerCmdPNP(); - + +#ifdef BUILD_NOTIFICATION registerCmdNotification(); +#endif #ifdef CONTEST registerCmdContest(); diff --git a/src/operation/iRT/interface/CMakeLists.txt b/src/operation/iRT/interface/CMakeLists.txt index cacfd6144..ec8b9750f 100644 --- a/src/operation/iRT/interface/CMakeLists.txt +++ b/src/operation/iRT/interface/CMakeLists.txt @@ -17,9 +17,15 @@ target_link_libraries(irt_interface power ieda_feature idm - notification ) +if(BUILD_NOTIFICATION) + target_link_libraries(irt_interface + PRIVATE + notification + ) +endif() + target_include_directories(irt_interface PUBLIC ${IRT_INTERFACE} diff --git a/src/operation/iRT/interface/RTInterface.cpp b/src/operation/iRT/interface/RTInterface.cpp index adb97881d..e20826932 100644 --- a/src/operation/iRT/interface/RTInterface.cpp +++ b/src/operation/iRT/interface/RTInterface.cpp @@ -23,7 +23,9 @@ #include "GDSPlotter.hpp" #include "LayerAssigner.hpp" #include "Monitor.hpp" +#ifdef BUILD_NOTIFICATION #include "NotificationUtility.h" +#endif #include "PinAccessor.hpp" #include "RTInterface.hpp" #include "SpaceRouter.hpp" @@ -1837,6 +1839,7 @@ std::vector> RTInterface::getPlanarTopoList(std::vector json_path_map) { +#ifdef BUILD_NOTIFICATION std::map notification; notification["step_name"] = "routing"; notification["stage"] = stage; @@ -1845,6 +1848,11 @@ void RTInterface::sendNotification(std::string stage, int32_t iter, std::map& pin_nodes) { Vector to_be_removed_nodes; - for (auto& [node_name, rc_node] : rc_tree.get_nodes()) { + for (auto& node_pair : rc_tree.get_nodes()) { + auto& node_name = node_pair.first; + auto& rc_node = node_pair.second; if (rc_node.cap() == 0.0) { // only delete the internal direct node. if (((rc_node.get_fanin().size() == 2) && @@ -543,7 +545,10 @@ MatrixXd ArnoldiNet::calcDelayAndSlew( } } - auto [diag, B, W] = *_diag_B_W; + auto diag_B_W = *_diag_B_W; + auto& diag = std::get<0>(diag_B_W); + auto& B = std::get<1>(diag_B_W); + auto& W = std::get<2>(diag_B_W); DVERBOSE_VLOG(1) << "diag\n" << diag; DVERBOSE_VLOG(1) << "W\n" << W; @@ -831,8 +836,9 @@ std::optional> ArnoldiNet::delay( std::optional output_current, AnalysisMode mode, TransType trans_type) { if (output_current) { - auto [total_time, num_points] = - (*output_current)->getSimulationTotalTimeAndNumPoints(); + auto total_time_and_num_points = (*output_current)->getSimulationTotalTimeAndNumPoints(); + auto total_time = std::get<0>(total_time_and_num_points); + auto num_points = std::get<1>(total_time_and_num_points); auto get_current = [&output_current]( double start_time, double end_time, @@ -869,8 +875,9 @@ std::optional ArnoldiNet::slew( // } if (output_current) { - auto [total_time, num_points] = - (*output_current)->getSimulationTotalTimeAndNumPoints(); + auto total_time_and_num_points = (*output_current)->getSimulationTotalTimeAndNumPoints(); + auto total_time = std::get<0>(total_time_and_num_points); + auto num_points = std::get<1>(total_time_and_num_points); auto get_current = [&output_current]( double start_time, double end_time, diff --git a/src/operation/iSTA/source/module/sdc-cmd/CmdGetClocks.cc b/src/operation/iSTA/source/module/sdc-cmd/CmdGetClocks.cc index e102a54f1..a43eb1376 100644 --- a/src/operation/iSTA/source/module/sdc-cmd/CmdGetClocks.cc +++ b/src/operation/iSTA/source/module/sdc-cmd/CmdGetClocks.cc @@ -47,7 +47,9 @@ unsigned CmdGetClocks::exec() { std::vector obj_list; - for (auto& [clock_name, the_clock] : the_clocks) { + for (auto& clock_pair : the_clocks) { + auto& clock_name = clock_pair.first; + auto& the_clock = clock_pair.second; auto it = std::find_if( clock_list.begin(), clock_list.end(), [clock_name](auto clock_pattern) { if ((clock_pattern == "*") || (clock_name == clock_pattern)) { diff --git a/src/operation/iSTA/source/module/sta/StaApplySdc.cc b/src/operation/iSTA/source/module/sta/StaApplySdc.cc index 009c04319..e8c4ba909 100644 --- a/src/operation/iSTA/source/module/sta/StaApplySdc.cc +++ b/src/operation/iSTA/source/module/sta/StaApplySdc.cc @@ -671,7 +671,9 @@ unsigned StaApplySdc::processClockUncertainty( auto obj2uncertainty = get_uncertainty(); - for (auto [obj, uncertainty] : obj2uncertainty) { + for (auto& obj_pair : obj2uncertainty) { + auto& obj = obj_pair.first; + auto& uncertainty = obj_pair.second; std::visit(overloaded{ [&apply_clock_uncertainty_to_clk, uncertainty](SdcCommandObj* sdc_obj) { diff --git a/src/utility/CMakeLists.txt b/src/utility/CMakeLists.txt index 113815575..0ceee2615 100644 --- a/src/utility/CMakeLists.txt +++ b/src/utility/CMakeLists.txt @@ -1,58 +1,60 @@ -cmake_minimum_required(VERSION 3.11) -set(CMAKE_CXX_STANDARD 20) - -# add include and lib dirs -include_directories(SYSTEM ${HOME_THIRDPARTY}) -include_directories(${HOME_UTILITY}/stdBase/include) -include_directories(${HOME_UTILITY}/stdBase/graph) -include_directories(${HOME_UTILITY}/log) -include_directories(${HOME_UTILITY}/string) -include_directories(${HOME_UTILITY}/tcl) -include_directories(${HOME_UTILITY}) - -link_directories(${CMAKE_BINARY_DIR}/lib) - -add_subdirectory(json) -add_subdirectory(log) -add_subdirectory(string) -add_subdirectory(tcl) -add_subdirectory(time) -add_subdirectory(stdBase) -add_subdirectory(usage) -add_subdirectory(report) -add_subdirectory(memory) -add_subdirectory(notification) - -option(BASE_RUN_TESTS "If ON, the tests will be run." OFF) - -if(BASE_RUN_TESTS) - message(STATUS "RUN BASE TESTS") - - # build test - aux_source_directory(./test SourceFiles) - add_executable(base_test ${SourceFiles}) - - set(MyLibs - log - tcl - str - time - graph) - - target_link_libraries( - base_test - gmock_main - gtest - gmock - pthread - ${MyLibs}) - - add_custom_command( - TARGET base_test - POST_BUILD - COMMAND ${CMAKE_COMMAND} -E copy_if_different ${SO_FILES} - ${CMAKE_CURRENT_BINARY_DIR}/ - COMMAND ${CMAKE_COMMAND} -E copy_if_different ${GLOG_SO_FILES} - ${CMAKE_CURRENT_BINARY_DIR}/) - -endif(BASE_RUN_TESTS) +cmake_minimum_required(VERSION 3.11) +set(CMAKE_CXX_STANDARD 20) + +# add include and lib dirs +include_directories(SYSTEM ${HOME_THIRDPARTY}) +include_directories(${HOME_UTILITY}/stdBase/include) +include_directories(${HOME_UTILITY}/stdBase/graph) +include_directories(${HOME_UTILITY}/log) +include_directories(${HOME_UTILITY}/string) +include_directories(${HOME_UTILITY}/tcl) +include_directories(${HOME_UTILITY}) + +link_directories(${CMAKE_BINARY_DIR}/lib) + +add_subdirectory(json) +add_subdirectory(log) +add_subdirectory(string) +add_subdirectory(tcl) +add_subdirectory(time) +add_subdirectory(stdBase) +add_subdirectory(usage) +add_subdirectory(report) +add_subdirectory(memory) +if(BUILD_NOTIFICATION) + add_subdirectory(notification) +endif() + +option(BASE_RUN_TESTS "If ON, the tests will be run." OFF) + +if(BASE_RUN_TESTS) + message(STATUS "RUN BASE TESTS") + + # build test + aux_source_directory(./test SourceFiles) + add_executable(base_test ${SourceFiles}) + + set(MyLibs + log + tcl + str + time + graph) + + target_link_libraries( + base_test + gmock_main + gtest + gmock + pthread + ${MyLibs}) + + add_custom_command( + TARGET base_test + POST_BUILD + COMMAND ${CMAKE_COMMAND} -E copy_if_different ${SO_FILES} + ${CMAKE_CURRENT_BINARY_DIR}/ + COMMAND ${CMAKE_COMMAND} -E copy_if_different ${GLOG_SO_FILES} + ${CMAKE_CURRENT_BINARY_DIR}/) + +endif(BASE_RUN_TESTS) diff --git a/src/vectorization/src/feature/vec_feature_drc.cpp b/src/vectorization/src/feature/vec_feature_drc.cpp index 967d79689..1c4ade1cf 100644 --- a/src/vectorization/src/feature/vec_feature_drc.cpp +++ b/src/vectorization/src/feature/vec_feature_drc.cpp @@ -69,8 +69,12 @@ void VecFeatureDrc::markNodes() // used for recording the mapping between drc_id and drc_type (rule) std::map drc_id_to_type; - for (auto& [rule, drc_list_map] : detail_drc_map) { - for (auto& [layer_name, drc_spot_list] : drc_list_map) { + for (auto& rule_pair : detail_drc_map) { + auto& rule = rule_pair.first; + auto& drc_list_map = rule_pair.second; + for (auto& layer_pair : drc_list_map) { + auto& layer_name = layer_pair.first; + auto& drc_spot_list = layer_pair.second; #pragma omp parallel for schedule(dynamic) for (int i = 0; i < (int) drc_spot_list.size(); ++i) { /// set to node if node data exist @@ -84,8 +88,11 @@ void VecFeatureDrc::markNodes() /// get row & col bool b_find_net = false; - auto [row_1, row_2, co_1, col_2] - = gridInfoInst.get_node_id_range(drc_spot.ll_x - 1, drc_spot.ll_y + 1, drc_spot.ur_x - 1, drc_spot.ur_y + 1); + auto node_range = gridInfoInst.get_node_id_range(drc_spot.ll_x - 1, drc_spot.ll_y + 1, drc_spot.ur_x - 1, drc_spot.ur_y + 1); + auto row_1 = std::get<0>(node_range); + auto row_2 = std::get<1>(node_range); + auto co_1 = std::get<2>(node_range); + auto col_2 = std::get<3>(node_range); for (int row = row_1; row <= row_2; ++row) { for (int col = co_1; col <= col_2; ++col) { auto* node = grid.get_node(row, col); @@ -150,7 +157,9 @@ void VecFeatureDrc::markWires() auto* wire_feature = wire.get_feature(true); std::set node_list; - for (auto& [node1, node2] : wire.get_paths()) { + for (auto& node_pair : wire.get_paths()) { + auto* node1 = node_pair.first; + auto* node2 = node_pair.second; if (node1->get_layer_id() == node2->get_layer_id()) { auto order = node1->get_layer_id(); auto& grid = layout_layers.findLayoutLayer(order)->get_grid(); @@ -291,4 +300,4 @@ void VecFeatureDrc::markNets() LOG_INFO << "Vectorization mark net drc end..."; } -} // namespace ivec \ No newline at end of file +} // namespace ivec diff --git a/src/vectorization/src/feature/vec_feature_statis.cpp b/src/vectorization/src/feature/vec_feature_statis.cpp index 786ef3fd1..d5910c33b 100644 --- a/src/vectorization/src/feature/vec_feature_statis.cpp +++ b/src/vectorization/src/feature/vec_feature_statis.cpp @@ -105,7 +105,9 @@ void VecFeatureStatis::feature_graph() for (auto& wire : vec_net.get_wires()) { auto* wire_feature = wire.get_feature(true); - for (auto& [node1, node2] : wire.get_paths()) { + for (auto& node_pair : wire.get_paths()) { + auto* node1 = node_pair.first; + auto* node2 = node_pair.second; if (node1->get_layer_id() == node2->get_layer_id()) { auto order = node1->get_layer_id(); auto* layout_layer = layout_layers.findLayoutLayer(order); @@ -303,17 +305,23 @@ void VecFeatureStatis::feature_patch() patch.ir_drop_map = cell_ir_map_find->second; } - for (auto& [layer_id, patch_layer] : patch.get_layer_map()) { + for (auto& layer_pair : patch.get_layer_map()) { + auto& layer_id = layer_pair.first; + auto& patch_layer = layer_pair.second; patch_layer.wire_width = layout_layers.findLayoutLayer(layer_id)->get_wire_width(); // obtain congestion value for each layer in the patch std::string layer_name = layout_layers.findLayoutLayer(layer_id)->get_layer_name(); patch_layer.congestion = layer_congestion_map[patch_id][layer_name]; - for (auto& [net_id, vec_net] : patch_layer.get_sub_nets()) { + for (auto& net_pair : patch_layer.get_sub_nets()) { + auto& net_id = net_pair.first; + auto& vec_net = net_pair.second; for (auto& wire : vec_net.get_wires()) { auto* wire_feature = wire.get_feature(true); - for (auto& [node1, node2] : wire.get_paths()) { + for (auto& node_pair : wire.get_paths()) { + auto* node1 = node_pair.first; + auto* node2 = node_pair.second; if (node1->get_layer_id() == node2->get_layer_id()) { auto order = node1->get_layer_id(); auto* layout_layer = layout_layers.findLayoutLayer(order); @@ -365,4 +373,4 @@ void VecFeatureStatis::feature_patch() LOG_INFO << "Vectorization feature patch end..."; } -} // namespace ivec \ No newline at end of file +} // namespace ivec diff --git a/src/vectorization/src/feature/vec_feature_timing.cpp b/src/vectorization/src/feature/vec_feature_timing.cpp index 5947afa78..7ca58a362 100644 --- a/src/vectorization/src/feature/vec_feature_timing.cpp +++ b/src/vectorization/src/feature/vec_feature_timing.cpp @@ -84,7 +84,9 @@ void VecFeatureTiming::build() void VecFeatureTiming::buildWireTimingPowerFeature(VecNet* vec_net, const std::string& net_name) { auto* eval_tp = ieval::InitSTA::getInst(); - auto [toggle, voltage] = eval_tp->getNetToggleAndVoltage(net_name); + auto toggle_voltage = eval_tp->getNetToggleAndVoltage(net_name); + double toggle = toggle_voltage.first; + double voltage = toggle_voltage.second; auto all_node_slews = eval_tp->getAllNodesSlew(net_name); auto get_node_feature = [this, eval_tp, toggle, voltage, &all_node_slews]( @@ -92,7 +94,9 @@ void VecFeatureTiming::buildWireTimingPowerFeature(VecNet* vec_net, const std::s std::string node_name; int pin_id = vec_node->get_node_data()->get_pin_id(); if (pin_id != -1) { - auto [inst_name, pin_type_name] = _layout->findPinName(pin_id); + auto pin_name_pair = _layout->findPinName(pin_id); + auto inst_name = pin_name_pair.first; + auto pin_type_name = pin_name_pair.second; auto pin_name = !inst_name.empty() ? (inst_name + ":" + pin_type_name) : pin_type_name; node_name = pin_name; } else { @@ -115,10 +119,24 @@ void VecFeatureTiming::buildWireTimingPowerFeature(VecNet* vec_net, const std::s for (auto& wire : vec_net->get_wires()) { auto* wire_feature = wire.get_feature(true); - auto [src, snk] = wire.get_connected_nodes(); + auto connected_nodes = wire.get_connected_nodes(); + auto* src = connected_nodes.first; + auto* snk = connected_nodes.second; - auto [src_R, src_C, src_slew, src_delay, src_power] = get_node_feature(net_name, src); - auto [snk_R, snk_C, snk_slew, snk_delay, snk_power] = get_node_feature(net_name, snk); + auto src_feature = get_node_feature(net_name, src); + auto snk_feature = get_node_feature(net_name, snk); + + double src_R = std::get<0>(src_feature); + double src_C = std::get<1>(src_feature); + double src_slew = std::get<2>(src_feature); + double src_delay = std::get<3>(src_feature); + double src_power = std::get<4>(src_feature); + + double snk_R = std::get<0>(snk_feature); + double snk_C = std::get<1>(snk_feature); + double snk_slew = std::get<2>(snk_feature); + double snk_delay = std::get<3>(snk_feature); + double snk_power = std::get<4>(snk_feature); double wire_resistance = std::abs(snk_R - src_R); double wire_capacitance = std::abs(snk_C - src_C); @@ -175,4 +193,4 @@ void VecFeatureTiming::buildNetTimingPowerFeature() } } -} // namespace ivec \ No newline at end of file +} // namespace ivec diff --git a/src/vectorization/src/graph/data_manager/vec_graph_dm.cpp b/src/vectorization/src/graph/data_manager/vec_graph_dm.cpp index 67a5079fa..756132d4d 100644 --- a/src/vectorization/src/graph/data_manager/vec_graph_dm.cpp +++ b/src/vectorization/src/graph/data_manager/vec_graph_dm.cpp @@ -42,11 +42,11 @@ bool VecGraphDataManager::buildGraphData(bool is_placement_mode) if (layer1 == layer2) { auto& grid = layout_layers.findLayoutLayer(layer1)->get_grid(); - auto [row1, col1] = gridInfoInst.findNodeID(x1, y1); - auto* node1 = grid.get_node(row1, col1); + auto node1_id = gridInfoInst.findNodeID(x1, y1); + auto* node1 = grid.get_node(node1_id.first, node1_id.second); - auto [row2, col2] = gridInfoInst.findNodeID(x2, y2); - auto* node2 = grid.get_node(row2, col2); + auto node2_id = gridInfoInst.findNodeID(x2, y2); + auto* node2 = grid.get_node(node2_id.first, node2_id.second); if (node1 == nullptr || node1->get_node_data() == nullptr || node2 == nullptr || node2->get_node_data() == nullptr) { LOG_ERROR << "error node...."; @@ -58,12 +58,12 @@ bool VecGraphDataManager::buildGraphData(bool is_placement_mode) return std::make_pair(node1, node2); } else { auto& grid1 = layout_layers.findLayoutLayer(layer1)->get_grid(); - auto [row1, col1] = gridInfoInst.findNodeID(x1, y1); - auto* node1 = grid1.get_node(row1, col1); + auto node1_id = gridInfoInst.findNodeID(x1, y1); + auto* node1 = grid1.get_node(node1_id.first, node1_id.second); auto& grid2 = layout_layers.findLayoutLayer(layer2)->get_grid(); - auto [row2, col2] = gridInfoInst.findNodeID(x2, y2); - auto* node2 = grid2.get_node(row2, col2); + auto node2_id = gridInfoInst.findNodeID(x2, y2); + auto* node2 = grid2.get_node(node2_id.first, node2_id.second); if (node1 == nullptr || node1->get_node_data() == nullptr || node2 == nullptr || node2->get_node_data() == nullptr) { LOG_ERROR << "error node...."; @@ -78,7 +78,9 @@ bool VecGraphDataManager::buildGraphData(bool is_placement_mode) auto convert_to_routing_graph = [&](const WireGraph& wire_graph) -> NetRoutingGraph { NetRoutingGraph routing_graph; - auto [v_iter, v_end] = boost::vertices(wire_graph); + auto vertices = boost::vertices(wire_graph); + auto v_iter = vertices.first; + auto v_end = vertices.second; for (; v_iter != v_end; ++v_iter) { auto v = *v_iter; auto x = wire_graph[v].x; @@ -92,7 +94,9 @@ bool VecGraphDataManager::buildGraphData(bool is_placement_mode) }; routing_graph.vertices.emplace_back(vertex); } - auto [e_iter, e_end] = boost::edges(wire_graph); + auto edges = boost::edges(wire_graph); + auto e_iter = edges.first; + auto e_end = edges.second; for (; e_iter != e_end; ++e_iter) { auto e = *e_iter; auto source = boost::source(e, wire_graph); @@ -104,9 +108,9 @@ bool VecGraphDataManager::buildGraphData(bool is_placement_mode) continue; } std::vector path; - std::ranges::for_each(wire_path, [&](const std::pair& point_pair) -> void { + for (const auto& point_pair : wire_path) { path.emplace_back(NetRoutingPoint{bg::get<0>(point_pair.first), bg::get<1>(point_pair.first), bg::get<2>(point_pair.first)}); - }); + } path.emplace_back( NetRoutingPoint{bg::get<0>(wire_path.back().second), bg::get<1>(wire_path.back().second), bg::get<2>(wire_path.back().second)}); NetRoutingEdge edge{ @@ -165,8 +169,10 @@ bool VecGraphDataManager::buildGraphData(bool is_placement_mode) auto source_label = wire_graph[source]; auto target_label = wire_graph[target]; - auto [node1, node2] = get_nodes(source_label.x, source_label.y, source_label.layer_id, target_label.x, target_label.y, - target_label.layer_id, layout_layers); + auto node_pair = get_nodes(source_label.x, source_label.y, source_label.layer_id, target_label.x, target_label.y, + target_label.layer_id, layout_layers); + auto* node1 = node_pair.first; + auto* node2 = node_pair.second; /// ignore same node if (node1 == node2) { @@ -202,11 +208,13 @@ bool VecGraphDataManager::buildGraphData(bool is_placement_mode) VecNode* bk_end = nullptr; int i = 0; #endif - std::ranges::for_each(wire_graph[edge].path, [&](auto& point_pair) -> void { + for (auto& point_pair : wire_graph[edge].path) { auto start_point = point_pair.first; auto end_point = point_pair.second; - auto [node1, node2] = get_nodes(bg::get<0>(start_point), bg::get<1>(start_point), bg::get<2>(start_point), bg::get<0>(end_point), - bg::get<1>(end_point), bg::get<2>(end_point), layout_layers); + auto node_pair = get_nodes(bg::get<0>(start_point), bg::get<1>(start_point), bg::get<2>(start_point), bg::get<0>(end_point), + bg::get<1>(end_point), bg::get<2>(end_point), layout_layers); + auto* node1 = node_pair.first; + auto* node2 = node_pair.second; /// ignore same node if (node1 != node2) { @@ -219,10 +227,10 @@ bool VecGraphDataManager::buildGraphData(bool is_placement_mode) bk_start = node1; if (bk_end != bk_start) { - std::ranges::for_each(wire_graph[edge].path, [&](auto& p) -> void { - LOG_INFO << "[" << bg::get<0>(p.first) << "," << bg::get<1>(p.first) << "," << bg::get<2>(p.first) << "] [" - << bg::get<0>(p.second) << "," << bg::get<1>(p.second) << "," << bg::get<2>(p.second) << "]"; - }); + for (auto& p : wire_graph[edge].path) { + LOG_INFO << "[" << bg::get<0>(p.first) << "," << bg::get<1>(p.first) << "," << bg::get<2>(p.first) << "] [" + << bg::get<0>(p.second) << "," << bg::get<1>(p.second) << "," << bg::get<2>(p.second) << "]"; + } } bk_end = node2; @@ -235,7 +243,7 @@ bool VecGraphDataManager::buildGraphData(bool is_placement_mode) pin_ids_paths.insert(node2->get_node_data()->get_pin_id()); } #endif - }); + } vec_net->addWire(vec_wire); } @@ -262,4 +270,4 @@ bool VecGraphDataManager::buildGraphData(bool is_placement_mode) return true; } -} // namespace ivec \ No newline at end of file +} // namespace ivec diff --git a/src/vectorization/src/layout/data_manager/vec_layout_init.cpp b/src/vectorization/src/layout/data_manager/vec_layout_init.cpp index 36de6b577..69e62d94f 100644 --- a/src/vectorization/src/layout/data_manager/vec_layout_init.cpp +++ b/src/vectorization/src/layout/data_manager/vec_layout_init.cpp @@ -237,7 +237,9 @@ void VecLayoutInit::buildLayoutGrid() auto& layout_layer = it->second; auto& grid = layout_layer.get_grid(); - auto [node_row_num, node_col_num] = grid.buildNodeMatrix(order); + auto node_row_col = grid.buildNodeMatrix(order); + auto node_row_num = node_row_col.first; + auto node_col_num = node_row_col.second; LOG_INFO << "Vectorization layer order : " << order << ", row = " << node_row_num << ", col = " << node_col_num; } @@ -257,7 +259,9 @@ void VecLayoutInit::transVia(idb::IdbVia* idb_via, int net_id, VecNodeTYpe type) } auto& grid = layout_layer->get_grid(); auto* via_coordinate = idb_via->get_coordinate(); - auto [row, col] = gridInfoInst.findNodeID(via_coordinate->get_x(), via_coordinate->get_y()); + auto node_id = gridInfoInst.findNodeID(via_coordinate->get_x(), via_coordinate->get_y()); + auto row = node_id.first; + auto col = node_id.second; auto* node = grid.get_node(row, col, true); node->set_col_id(col); @@ -319,10 +323,10 @@ void VecLayoutInit::initPDN() _layout->add_pdn_map(i, idb_net->get_net_name()); auto* idb_wires = idb_net->get_wire_list(); - for (auto* idb_wire : idb_wires->get_wire_list()) { + for (auto* idb_wire : idb_wires->get_wire_list()) { #pragma omp parallel for schedule(dynamic) - for (int i = 0; i < (int) idb_wire->get_segment_list().size(); ++i) { - auto* idb_segment = idb_wire->get_segment_list()[i]; + for (int segment_idx = 0; segment_idx < (int) idb_wire->get_segment_list().size(); ++segment_idx) { + auto* idb_segment = idb_wire->get_segment_list()[segment_idx]; /// wire if (idb_segment->get_point_num() >= 2) { auto* routing_layer = dynamic_cast(idb_segment->get_layer()); @@ -358,7 +362,11 @@ void VecLayoutInit::initPDN() continue; } auto& grid = layout_layer->get_grid(); - auto [row_1, row_2, co_1, col_2] = gridInfoInst.get_node_id_range(ll_x, ur_x, ll_y, ur_y); + auto node_range = gridInfoInst.get_node_id_range(ll_x, ur_x, ll_y, ur_y); + auto row_1 = std::get<0>(node_range); + auto row_2 = std::get<1>(node_range); + auto co_1 = std::get<2>(node_range); + auto col_2 = std::get<3>(node_range); for (int row = row_1; row <= row_2; ++row) { for (int col = co_1; col <= col_2; ++col) { /// set node data @@ -517,7 +525,9 @@ void VecLayoutInit::transPin(idb::IdbPin* idb_pin, int net_id, VecNodeTYpe type, if (layer_shape->is_via()) { for (IdbRect* rect : layer_shape->get_rect_list()) { /// build grid - auto [row_id, col_id] = gridInfoInst.findNodeID(rect->get_middle_point_x(), rect->get_middle_point_y()); + auto node_id = gridInfoInst.findNodeID(rect->get_middle_point_x(), rect->get_middle_point_y()); + auto row_id = node_id.first; + auto col_id = node_id.second; auto* node = grid.get_node(row_id, col_id, true); node->set_col_id(col_id); node->set_row_id(row_id); @@ -557,7 +567,11 @@ void VecLayoutInit::transPin(idb::IdbPin* idb_pin, int net_id, VecNodeTYpe type, int lly = rect->get_low_y(); int ury = rect->get_high_y(); - auto [row_1, row_2, col_1, col_2] = gridInfoInst.get_node_id_range(llx, urx, lly, ury); + auto node_range = gridInfoInst.get_node_id_range(llx, urx, lly, ury); + auto row_1 = std::get<0>(node_range); + auto row_2 = std::get<1>(node_range); + auto col_1 = std::get<2>(node_range); + auto col_2 = std::get<3>(node_range); for (int row = row_1; row <= row_2; ++row) { for (int col = col_1; col <= col_2; ++col) { @@ -614,7 +628,11 @@ void VecLayoutInit::transNetRect(int32_t ll_x, int32_t ll_y, int32_t ur_x, int32 } auto& grid = layout_layer->get_grid(); - auto [row_1, row_2, col_1, col_2] = gridInfoInst.get_node_id_range(ll_x, ur_x, ll_y, ur_y); + auto node_range = gridInfoInst.get_node_id_range(ll_x, ur_x, ll_y, ur_y); + auto row_1 = std::get<0>(node_range); + auto row_2 = std::get<1>(node_range); + auto col_1 = std::get<2>(node_range); + auto col_2 = std::get<3>(node_range); /// net wire must only occupy one grid size for (int row = row_1; row <= row_2; ++row) { for (int col = col_1; col <= col_2; ++col) { @@ -649,7 +667,11 @@ void VecLayoutInit::transEnclosure(int32_t ll_x, int32_t ll_y, int32_t ur_x, int return; } auto& grid = layout_layer->get_grid(); - auto [row_1, row_2, col_1, col_2] = gridInfoInst.get_node_id_range(ll_x, ur_x, ll_y, ur_y); + auto node_range = gridInfoInst.get_node_id_range(ll_x, ur_x, ll_y, ur_y); + auto row_1 = std::get<0>(node_range); + auto row_2 = std::get<1>(node_range); + auto col_1 = std::get<2>(node_range); + auto col_2 = std::get<3>(node_range); for (int row = row_1; row <= row_2; ++row) { for (int col = col_1; col <= col_2; ++col) { @@ -687,7 +709,11 @@ void VecLayoutInit::transNetDelta(int32_t ll_x, int32_t ll_y, int32_t ur_x, int3 return; } auto& grid = layout_layer->get_grid(); - auto [row_1, row_2, col_1, col_2] = gridInfoInst.get_node_id_range(ll_x, ur_x, ll_y, ur_y); + auto node_range = gridInfoInst.get_node_id_range(ll_x, ur_x, ll_y, ur_y); + auto row_1 = std::get<0>(node_range); + auto row_2 = std::get<1>(node_range); + auto col_1 = std::get<2>(node_range); + auto col_2 = std::get<3>(node_range); for (int row = row_1; row <= row_2; ++row) { for (int col = col_1; col <= col_2; ++col) { @@ -856,4 +882,4 @@ void VecLayoutInit::initNets(bool is_placement_mode) LOG_INFO << "Vectorization init nets end..."; } -} // namespace ivec \ No newline at end of file +} // namespace ivec diff --git a/src/vectorization/src/layout/data_manager/vec_wire_pattern.cc b/src/vectorization/src/layout/data_manager/vec_wire_pattern.cc index 02484af5b..a0e9c44fe 100644 --- a/src/vectorization/src/layout/data_manager/vec_wire_pattern.cc +++ b/src/vectorization/src/layout/data_manager/vec_wire_pattern.cc @@ -85,11 +85,11 @@ std::vector VecWirePatternGenerator::getPointList(VecNetWire& wire) auto& path = wire.get_paths(); std::vector points; for (auto& [start, end] : path) { - auto start_point = Point{start->get_x(), start->get_y(), start->get_layer_id()}; + auto start_point = Point{static_cast(start->get_x()), static_cast(start->get_y()), static_cast(start->get_layer_id())}; points.push_back(start_point); } auto end = path.back().second; - points.push_back(Point{end->get_x(), end->get_y(), end->get_layer_id()}); + points.push_back(Point{static_cast(end->get_x()), static_cast(end->get_y()), static_cast(end->get_layer_id())}); return points; }