diff --git a/compiler-rt/test/profile/instrprof-tmpdir.c b/compiler-rt/test/profile/instrprof-tmpdir.c index 7206df3c2eb0c..9d4b3d35e94e7 100644 --- a/compiler-rt/test/profile/instrprof-tmpdir.c +++ b/compiler-rt/test/profile/instrprof-tmpdir.c @@ -1,3 +1,8 @@ +// AIX does not support env -u. +// TODO(boomanaiden154): Reenable AIX support once we use the internal shell by +// default. +// UNSUPPORTED: system-aix + // RUN: rm -rf %t // RUN: mkdir -p %t // RUN: cd %t @@ -12,8 +17,7 @@ // RUN: llvm-profdata show ./raw2.profraw | FileCheck %s -check-prefix TMPDIR // // Check that we fall back to the default path if TMPDIR is missing. -// RUN: %if system-aix %{ unset TMPDIR %} -// RUN: env %if !system-aix %{ -u TMPDIR %} LLVM_PROFILE_FILE="%%t/raw3.profraw" %run %t/binary 2>&1 | FileCheck %s -check-prefix MISSING +// RUN: env -u TMPDIR LLVM_PROFILE_FILE="%%t/raw3.profraw" %run %t/binary 2>&1 | FileCheck %s -check-prefix MISSING // RUN: llvm-profdata show ./default.profraw | FileCheck %s -check-prefix TMPDIR // TMPDIR: Maximum function count: 1 diff --git a/libcxx/utils/ci/buildkite-pipeline.yml b/libcxx/utils/ci/buildkite-pipeline.yml index ca83af9824b83..2ac69c38ebffa 100644 --- a/libcxx/utils/ci/buildkite-pipeline.yml +++ b/libcxx/utils/ci/buildkite-pipeline.yml @@ -103,7 +103,6 @@ steps: queue: libcxx-builders os: aix <<: *common - skip: "https://github.com/llvm/llvm-project/issues/162516" - label: AIX (64-bit) command: libcxx/utils/ci/run-buildbot aix @@ -115,7 +114,6 @@ steps: queue: libcxx-builders os: aix <<: *common - skip: "https://github.com/llvm/llvm-project/issues/162516" - group: ':freebsd: FreeBSD' steps: diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp index b6e012f621785..f4efaafa59651 100644 --- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp +++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp @@ -1128,40 +1128,11 @@ bool SIFoldOperandsImpl::tryToFoldACImm( if (!AMDGPU::isSISrcInlinableOperand(Desc, UseOpIdx)) return false; - MachineOperand &UseOp = UseMI->getOperand(UseOpIdx); if (OpToFold.isImm() && OpToFold.isOperandLegal(*TII, *UseMI, UseOpIdx)) { appendFoldCandidate(FoldList, UseMI, UseOpIdx, OpToFold); return true; } - // TODO: Verify the following code handles subregisters correctly. - // TODO: Handle extract of global reference - if (UseOp.getSubReg()) - return false; - - if (!OpToFold.isReg()) - return false; - - Register UseReg = OpToFold.getReg(); - if (!UseReg.isVirtual()) - return false; - - // Maybe it is just a COPY of an immediate itself. - - // FIXME: Remove this handling. There is already special case folding of - // immediate into copy in foldOperand. This is looking for the def of the - // value the folding started from in the first place. - MachineInstr *Def = MRI->getVRegDef(UseReg); - if (Def && TII->isFoldableCopy(*Def)) { - MachineOperand &DefOp = Def->getOperand(1); - if (DefOp.isImm() && TII->isOperandLegal(*UseMI, UseOpIdx, &DefOp)) { - FoldableDef FoldableImm(DefOp.getImm(), OpToFold.DefRC, - OpToFold.DefSubReg); - appendFoldCandidate(FoldList, UseMI, UseOpIdx, FoldableImm); - return true; - } - } - return false; } diff --git a/llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp b/llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp index b9546c5fa236b..e902b71776973 100644 --- a/llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp +++ b/llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp @@ -24,6 +24,7 @@ #include "llvm/Analysis/ScalarEvolution.h" #include "llvm/IR/Dominators.h" #include "llvm/IR/IRBuilder.h" +#include "llvm/IR/ProfDataUtils.h" #include "llvm/Support/CommandLine.h" #include "llvm/Transforms/Scalar.h" #include "llvm/Transforms/Scalar/LoopPassManager.h" @@ -393,6 +394,17 @@ class ConstantTerminatorFoldingImpl { DTUpdates.push_back({DominatorTree::Insert, Preheader, BB}); ++NumLoopExitsDeleted; } + // We don't really need to add branch weights to DummySwitch, because all + // but one branches are just a temporary artifact - see the comment on top + // of this function. But, it's easy to estimate the weights, and it helps + // maintain a property of the overall compiler - that the branch weights + // don't "just get dropped" accidentally (i.e. profcheck) + if (DummySwitch->getParent()->getParent()->hasProfileData()) { + SmallVector DummyBranchWeights(1 + DummySwitch->getNumCases()); + // default. 100% probability, the rest are dead. + DummyBranchWeights[0] = 1; + setBranchWeights(*DummySwitch, DummyBranchWeights, /*IsExpected=*/false); + } assert(L.getLoopPreheader() == NewPreheader && "Malformed CFG?"); if (Loop *OuterLoop = LI.getLoopFor(Preheader)) { diff --git a/llvm/test/CodeGen/AMDGPU/true16-fold.mir b/llvm/test/CodeGen/AMDGPU/true16-fold.mir index 26e3ed6af856e..97b63977b04cb 100644 --- a/llvm/test/CodeGen/AMDGPU/true16-fold.mir +++ b/llvm/test/CodeGen/AMDGPU/true16-fold.mir @@ -222,3 +222,34 @@ body: | $vgpr0 = COPY %3 S_ENDPGM 0, implicit $vgpr0 ... + +# Make sure the immediate materialized by the v_mov_b16 isn't +# incorrectly folded into the bfi as 0. + +# FIXME: %4:vgpr_32 = COPY %3 is a direct copy from v16 to v32 and +# should probably fail the verifier +--- +name: mov_v16_copy_v32_fold_b32_regression +tracksRegLiveness: true +body: | + bb.0: + liveins: $vgpr0, $vgpr1 + + ; CHECK-LABEL: name: mov_v16_copy_v32_fold_b32_regression + ; CHECK: liveins: $vgpr0, $vgpr1 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr1 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 + ; CHECK-NEXT: [[V_MOV_B16_t16_e64_:%[0-9]+]]:vgpr_16 = V_MOV_B16_t16_e64 0, 15360, 0, implicit $exec + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B16_t16_e64_]] + ; CHECK-NEXT: [[V_BFI_B32_e64_:%[0-9]+]]:vgpr_32 = V_BFI_B32_e64 32767, [[COPY2]], [[COPY1]], implicit $exec + ; CHECK-NEXT: $vgpr0 = COPY [[V_BFI_B32_e64_]] + ; CHECK-NEXT: SI_RETURN implicit $vgpr0 + %0:vgpr_32 = COPY $vgpr1 + %1:vgpr_32 = COPY $vgpr0 + %3:vgpr_16 = V_MOV_B16_t16_e64 0, 15360, 0, implicit $exec + %4:vgpr_32 = COPY %3 + %5:vgpr_32 = V_BFI_B32_e64 32767, %4, %1, implicit $exec + $vgpr0 = COPY %5 + SI_RETURN implicit $vgpr0 +... diff --git a/llvm/test/CodeGen/AMDGPU/true16-imm-folded-to-0-regression.ll b/llvm/test/CodeGen/AMDGPU/true16-imm-folded-to-0-regression.ll new file mode 100644 index 0000000000000..0bebb5849ed81 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/true16-imm-folded-to-0-regression.ll @@ -0,0 +1,29 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck %s + +; Make sure that the 16-bit constant 0x3c00 isn't folded as 0 into +; v_bfi_b32. +define i32 @mov16_bfi_fold_regression(half %arg, i32 %arg1) { +; CHECK-LABEL: bfi_fold_regression: +; CHECK: ; %bb.0: ; %bb +; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; CHECK-NEXT: v_mov_b16_e32 v2.l, 0x3c00 +; CHECK-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v1 +; CHECK-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) +; CHECK-NEXT: v_bfi_b32 v0, 0x7fff, v2, v0 +; CHECK-NEXT: v_cndmask_b16 v0.l, 0x3c00, v0.l, vcc_lo +; CHECK-NEXT: s_delay_alu instid0(VALU_DEP_1) +; CHECK-NEXT: v_pack_b32_f16 v0, v0.l, 0 +; CHECK-NEXT: s_setpc_b64 s[30:31] +bb: + %cmp = icmp eq i32 %arg1, 0 + %call = call half @llvm.copysign.f16(half 0xH3C00, half %arg) + %select = select i1 %cmp, half 0xH3C00, half %call + %insertelement = insertelement <2 x half> zeroinitializer, half %select, i64 0 + %bitcast = bitcast <2 x half> %insertelement to i32 + ret i32 %bitcast +} + +declare half @llvm.copysign.f16(half, half) #0 + +attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } diff --git a/llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll b/llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll index 1ec212f0bb5ea..46b6209986fed 100644 --- a/llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll +++ b/llvm/test/Transforms/LoopSimplifyCFG/constant-fold-branch.ll @@ -1,4 +1,4 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals ; REQUIRES: asserts ; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes=loop-simplifycfg -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s ; RUN: opt -S -enable-loop-simplifycfg-term-folding=true -passes='require,loop(loop-simplifycfg)' -verify-loop-info -verify-dom-info -verify-loop-lcssa < %s | FileCheck %s @@ -59,7 +59,7 @@ define i32 @dead_backedge_test_switch_loop(i32 %end) { ; CHECK: dead_backedge: ; CHECK-NEXT: [[I_2]] = add i32 [[I_1]], 10 ; CHECK-NEXT: switch i32 1, label [[EXIT:%.*]] [ -; CHECK-NEXT: i32 0, label [[HEADER_BACKEDGE]] +; CHECK-NEXT: i32 0, label [[HEADER_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: exit: ; CHECK-NEXT: [[I_2_LCSSA:%.*]] = phi i32 [ [[I_2]], [[DEAD_BACKEDGE]] ] @@ -233,12 +233,12 @@ exit: ; Check that we preserve static reachibility of a dead exit block while deleting ; a branch. -define i32 @dead_exit_test_branch_loop(i32 %end) { +define i32 @dead_exit_test_branch_loop(i32 %end) !prof !{!"function_entry_count", i32 10} { ; CHECK-LABEL: @dead_exit_test_branch_loop( ; CHECK-NEXT: preheader: ; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[DEAD:%.*]] -; CHECK-NEXT: ] +; CHECK-NEXT: i32 1, label [[DEAD:%.*]] +; CHECK-NEXT: ], !prof [[PROF1:![0-9]+]] ; CHECK: preheader.split: ; CHECK-NEXT: br label [[HEADER:%.*]] ; CHECK: header: @@ -262,7 +262,7 @@ preheader: header: %i = phi i32 [0, %preheader], [%i.inc, %backedge] - br i1 true, label %backedge, label %dead + br i1 true, label %backedge, label %dead, !prof !{!"branch_weights", i32 10, i32 1} dead: br label %dummy @@ -286,7 +286,7 @@ define i32 @dead_exit_test_switch_loop(i32 %end) { ; CHECK-LABEL: @dead_exit_test_switch_loop( ; CHECK-NEXT: preheader: ; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[DEAD:%.*]] +; CHECK-NEXT: i32 1, label [[DEAD:%.*]] ; CHECK-NEXT: ] ; CHECK: preheader.split: ; CHECK-NEXT: br label [[HEADER:%.*]] @@ -383,9 +383,9 @@ define i32 @dead_loop_test_switch_loop(i32 %end) { ; CHECK: header: ; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[PREHEADER:%.*]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ] ; CHECK-NEXT: switch i32 1, label [[DEAD:%.*]] [ -; CHECK-NEXT: i32 0, label [[DEAD]] -; CHECK-NEXT: i32 1, label [[BACKEDGE]] -; CHECK-NEXT: i32 2, label [[DEAD]] +; CHECK-NEXT: i32 0, label [[DEAD]] +; CHECK-NEXT: i32 1, label [[BACKEDGE]] +; CHECK-NEXT: i32 2, label [[DEAD]] ; CHECK-NEXT: ] ; CHECK: dead: ; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1 @@ -552,7 +552,7 @@ define i32 @inf_loop_test_branch_loop(i32 %end) { ; CHECK-LABEL: @inf_loop_test_branch_loop( ; CHECK-NEXT: preheader: ; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[EXIT:%.*]] +; CHECK-NEXT: i32 1, label [[EXIT:%.*]] ; CHECK-NEXT: ] ; CHECK: preheader.split: ; CHECK-NEXT: br label [[HEADER:%.*]] @@ -592,7 +592,7 @@ define i32 @inf_loop_test_switch_loop(i32 %end) { ; CHECK-LABEL: @inf_loop_test_switch_loop( ; CHECK-NEXT: preheader: ; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[EXIT:%.*]] +; CHECK-NEXT: i32 1, label [[EXIT:%.*]] ; CHECK-NEXT: ] ; CHECK: preheader.split: ; CHECK-NEXT: br label [[HEADER:%.*]] @@ -1001,7 +1001,7 @@ define i32 @full_sub_loop_test_switch_loop(i32 %end) { ; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ] ; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[I]], [[I]] ; CHECK-NEXT: switch i32 1, label [[DEAD:%.*]] [ -; CHECK-NEXT: i32 0, label [[BACKEDGE]] +; CHECK-NEXT: i32 0, label [[BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: dead: ; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1 @@ -1010,7 +1010,7 @@ define i32 @full_sub_loop_test_switch_loop(i32 %end) { ; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ] ; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1 ; CHECK-NEXT: switch i32 1, label [[OUTER_BACKEDGE]] [ -; CHECK-NEXT: i32 0, label [[HEADER]] +; CHECK-NEXT: i32 0, label [[HEADER]] ; CHECK-NEXT: ] ; CHECK: outer_backedge: ; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ] @@ -1132,7 +1132,7 @@ define i32 @full_sub_loop_test_switch_loop_inverse_1(i32 %end) { ; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[OUTER_HEADER]] ], [ [[I_INC:%.*]], [[BACKEDGE:%.*]] ] ; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[I]], [[I]] ; CHECK-NEXT: switch i32 1, label [[BACKEDGE]] [ -; CHECK-NEXT: i32 0, label [[DEAD:%.*]] +; CHECK-NEXT: i32 0, label [[DEAD:%.*]] ; CHECK-NEXT: ] ; CHECK: dead: ; CHECK-NEXT: [[I_2:%.*]] = add i32 [[I]], 1 @@ -1141,7 +1141,7 @@ define i32 @full_sub_loop_test_switch_loop_inverse_1(i32 %end) { ; CHECK-NEXT: [[I_1:%.*]] = phi i32 [ [[I]], [[HEADER]] ], [ [[I_2]], [[DEAD]] ] ; CHECK-NEXT: [[I_INC]] = add i32 [[I_1]], 1 ; CHECK-NEXT: switch i32 1, label [[OUTER_BACKEDGE]] [ -; CHECK-NEXT: i32 0, label [[HEADER]] +; CHECK-NEXT: i32 0, label [[HEADER]] ; CHECK-NEXT: ] ; CHECK: outer_backedge: ; CHECK-NEXT: [[I_INC_LCSSA:%.*]] = phi i32 [ [[I_INC]], [[BACKEDGE]] ] @@ -1195,7 +1195,7 @@ define i32 @full_sub_loop_test_branch_loop_inverse_2(i32 %end) { ; CHECK: outer_header: ; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ] ; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]] +; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: preheader.split: ; CHECK-NEXT: br label [[HEADER:%.*]] @@ -1256,7 +1256,7 @@ define i32 @full_sub_loop_test_switch_loop_inverse_2(i32 %end) { ; CHECK: outer_header: ; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ] ; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]] +; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: preheader.split: ; CHECK-NEXT: br label [[HEADER:%.*]] @@ -1318,7 +1318,7 @@ define i32 @full_sub_loop_test_branch_loop_inverse_3(i32 %end) { ; CHECK: outer_header: ; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ] ; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]] +; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: preheader.split: ; CHECK-NEXT: br label [[HEADER:%.*]] @@ -1378,7 +1378,7 @@ define i32 @full_sub_loop_test_switch_loop_inverse_3(i32 %end) { ; CHECK: outer_header: ; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[J_INC:%.*]], [[OUTER_BACKEDGE:%.*]] ] ; CHECK-NEXT: switch i32 0, label [[PREHEADER_SPLIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]] +; CHECK-NEXT: i32 1, label [[OUTER_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: preheader.split: ; CHECK-NEXT: br label [[HEADER:%.*]] @@ -1441,7 +1441,7 @@ define i32 @exit_branch_from_inner_to_grandparent(i1 %cond1, i1 %cond2, i32 %N) ; CHECK: loop_2: ; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ] ; CHECK-NEXT: switch i32 0, label [[LOOP_2_SPLIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[LOOP_2_BACKEDGE]] +; CHECK-NEXT: i32 1, label [[LOOP_2_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: loop_2.split: ; CHECK-NEXT: br label [[LOOP_3:%.*]] @@ -1510,7 +1510,7 @@ define i32 @exit_switch_from_inner_to_grandparent(i1 %cond1, i1 %cond2, i32 %N) ; CHECK: loop_2: ; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[LOOP_1]] ], [ [[J_NEXT:%.*]], [[LOOP_2_BACKEDGE:%.*]] ] ; CHECK-NEXT: switch i32 0, label [[LOOP_2_SPLIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[LOOP_2_BACKEDGE]] +; CHECK-NEXT: i32 1, label [[LOOP_2_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: loop_2.split: ; CHECK-NEXT: br label [[LOOP_3:%.*]] @@ -1654,7 +1654,7 @@ define i32 @intermediate_switch_from_inner_to_grandparent(i1 %cond1, i1 %cond2, ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]] ; CHECK: intermediate: ; CHECK-NEXT: switch i32 1, label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]] [ -; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] +; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: loop_3_backedge: ; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1 @@ -1792,7 +1792,7 @@ define i32 @intermediate_switch_from_inner_to_parent(i1 %cond1, i1 %cond2, i32 % ; CHECK-NEXT: br i1 [[COND1:%.*]], label [[LOOP_3_BACKEDGE]], label [[INTERMEDIATE:%.*]] ; CHECK: intermediate: ; CHECK-NEXT: switch i32 1, label [[LOOP_2_BACKEDGE]] [ -; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] +; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: loop_3_backedge: ; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1 @@ -1944,7 +1944,7 @@ define i32 @intermediate_subloop_switch_from_inner_to_grandparent(i1 %cond1, i1 ; CHECK-NEXT: br i1 [[COND3:%.*]], label [[INTERMEDIATE_LOOP]], label [[INTERMEDIATE_EXIT:%.*]] ; CHECK: intermediate_exit: ; CHECK-NEXT: switch i32 1, label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]] [ -; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] +; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: loop_3_backedge: ; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1 @@ -2102,7 +2102,7 @@ define i32 @intermediate_subloop_switch_from_inner_to_parent(i1 %cond1, i1 %cond ; CHECK-NEXT: br i1 [[COND3:%.*]], label [[INTERMEDIATE_LOOP]], label [[INTERMEDIATE_EXIT:%.*]] ; CHECK: intermediate_exit: ; CHECK-NEXT: switch i32 1, label [[LOOP_2_BACKEDGE]] [ -; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] +; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: loop_3_backedge: ; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1 @@ -2267,7 +2267,7 @@ define i32 @intermediate_complex_subloop_switch_from_inner_to_parent(i1 %cond1, ; CHECK-NEXT: br i1 [[COND2:%.*]], label [[INTERMEDIATE_LOOP_BACKEDGE]], label [[INTERMEDIATE_EXIT:%.*]] ; CHECK: intermediate_exit: ; CHECK-NEXT: switch i32 1, label [[LOOP_2_BACKEDGE]] [ -; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] +; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: loop_3_backedge: ; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1 @@ -2440,7 +2440,7 @@ define i32 @intermediate_complex_subloop_switch_from_inner_to_grandparent(i1 %co ; CHECK-NEXT: br i1 [[COND2:%.*]], label [[INTERMEDIATE_LOOP_BACKEDGE]], label [[INTERMEDIATE_EXIT:%.*]] ; CHECK: intermediate_exit: ; CHECK-NEXT: switch i32 1, label [[LOOP_1_BACKEDGE_LOOPEXIT:%.*]] [ -; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] +; CHECK-NEXT: i32 0, label [[LOOP_3_BACKEDGE]] ; CHECK-NEXT: ] ; CHECK: loop_3_backedge: ; CHECK-NEXT: [[K_NEXT]] = add i32 [[K]], 1 @@ -2585,38 +2585,38 @@ define void @test_crash_01(i1 %arg, i32 %arg2) { ; CHECK-NEXT: bb: ; CHECK-NEXT: br label [[BB1:%.*]] ; CHECK: bb1: -; CHECK-NEXT: br i1 %arg, label [[BB17:%.*]], label [[BB2:%.*]] +; CHECK-NEXT: br i1 [[ARG:%.*]], label [[BB17:%.*]], label [[BB2:%.*]] ; CHECK: bb2: ; CHECK-NEXT: switch i32 0, label [[BB2_SPLIT:%.*]] [ -; CHECK-NEXT: i32 1, label [[BB19:%.*]] +; CHECK-NEXT: i32 1, label [[BB19:%.*]] ; CHECK-NEXT: ] ; CHECK: bb2.split: ; CHECK-NEXT: br label [[BB3:%.*]] ; CHECK: bb3: -; CHECK-NEXT: switch i32 %arg2, label [[BB16:%.*]] [ -; CHECK-NEXT: i32 0, label [[BB15:%.*]] -; CHECK-NEXT: i32 1, label [[BB14:%.*]] -; CHECK-NEXT: i32 2, label [[BB13:%.*]] -; CHECK-NEXT: i32 3, label [[BB12:%.*]] -; CHECK-NEXT: i32 4, label [[BB11:%.*]] -; CHECK-NEXT: i32 5, label [[BB8:%.*]] -; CHECK-NEXT: i32 6, label [[BB10:%.*]] -; CHECK-NEXT: i32 7, label [[BB9:%.*]] -; CHECK-NEXT: i32 8, label [[BB7:%.*]] +; CHECK-NEXT: switch i32 [[ARG2:%.*]], label [[BB16:%.*]] [ +; CHECK-NEXT: i32 0, label [[BB15:%.*]] +; CHECK-NEXT: i32 1, label [[BB14:%.*]] +; CHECK-NEXT: i32 2, label [[BB13:%.*]] +; CHECK-NEXT: i32 3, label [[BB12:%.*]] +; CHECK-NEXT: i32 4, label [[BB11:%.*]] +; CHECK-NEXT: i32 5, label [[BB8:%.*]] +; CHECK-NEXT: i32 6, label [[BB10:%.*]] +; CHECK-NEXT: i32 7, label [[BB9:%.*]] +; CHECK-NEXT: i32 8, label [[BB7:%.*]] ; CHECK-NEXT: ] ; CHECK: bb7: ; CHECK-NEXT: unreachable ; CHECK: bb8: -; CHECK-NEXT: switch i32 %arg2, label [[BB28:%.*]] [ -; CHECK-NEXT: i32 0, label [[BB27:%.*]] -; CHECK-NEXT: i32 1, label [[BB26:%.*]] -; CHECK-NEXT: i32 2, label [[BB23:%.*]] -; CHECK-NEXT: i32 3, label [[BB24:%.*]] -; CHECK-NEXT: i32 4, label [[BB25:%.*]] -; CHECK-NEXT: i32 5, label [[BB29:%.*]] -; CHECK-NEXT: i32 6, label [[BB22:%.*]] -; CHECK-NEXT: i32 7, label [[BB20:%.*]] -; CHECK-NEXT: i32 8, label [[BB21:%.*]] +; CHECK-NEXT: switch i32 [[ARG2]], label [[BB28:%.*]] [ +; CHECK-NEXT: i32 0, label [[BB27:%.*]] +; CHECK-NEXT: i32 1, label [[BB26:%.*]] +; CHECK-NEXT: i32 2, label [[BB23:%.*]] +; CHECK-NEXT: i32 3, label [[BB24:%.*]] +; CHECK-NEXT: i32 4, label [[BB25:%.*]] +; CHECK-NEXT: i32 5, label [[BB29:%.*]] +; CHECK-NEXT: i32 6, label [[BB22:%.*]] +; CHECK-NEXT: i32 7, label [[BB20:%.*]] +; CHECK-NEXT: i32 8, label [[BB21:%.*]] ; CHECK-NEXT: ] ; CHECK: bb9: ; CHECK-NEXT: unreachable @@ -2772,3 +2772,7 @@ bb28: ; preds = %bb8 bb29: ; preds = %bb8 br label %bb6 } +;. +; CHECK: [[META0:![0-9]+]] = !{!"function_entry_count", i32 10} +; CHECK: [[PROF1]] = !{!"branch_weights", i32 1, i32 0} +;. diff --git a/llvm/test/lit.cfg.py b/llvm/test/lit.cfg.py index ac0d40cf25a41..35ea8b84d7ec1 100644 --- a/llvm/test/lit.cfg.py +++ b/llvm/test/lit.cfg.py @@ -66,6 +66,8 @@ config.excludes.append("UpdateTestChecks") # TODO(#166655): Reenable Instrumentation tests config.excludes.append("Instrumentation") + # profiling doesn't work quite well on GPU, excluding + config.excludes.append("AMDGPU") # test_source_root: The root path where tests are located. config.test_source_root = os.path.dirname(__file__) diff --git a/llvm/utils/profcheck-xfail.txt b/llvm/utils/profcheck-xfail.txt index e9889ba9cbd81..b1f20a73c3b2b 100644 --- a/llvm/utils/profcheck-xfail.txt +++ b/llvm/utils/profcheck-xfail.txt @@ -1,8 +1,3 @@ -Analysis/LoopAccessAnalysis/memcheck-ni.ll -Analysis/MemorySSA/pr116227.ll -Analysis/MemorySSA/pr43641.ll -Analysis/MemorySSA/pr46574.ll -Analysis/MemorySSA/update-remove-dead-blocks.ll Bitcode/fcmp-fast.ll Bitcode/flags.ll CodeGen/AArch64/cgdata-merge-local.ll @@ -10,61 +5,6 @@ CodeGen/AArch64/llvm-masked-gather-legal-for-sve.ll CodeGen/AArch64/llvm-masked-scatter-legal-for-sve.ll CodeGen/AArch64/selectopt-cast.ll CodeGen/AArch64/selectopt.ll -CodeGen/AMDGPU/amdgpu-attributor-min-agpr-alloc.ll -CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll -CodeGen/AMDGPU/amdgpu-codegenprepare-sqrt.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-indirect-access-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-indirect-access.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-lower-all.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-non-kernel-declaration.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-all.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-no-kernel-lds-id.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-no-heap-ptr.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-O0.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomic-cmpxchg-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomicrmw-asan.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll -CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-vector-ptrs.ll -CodeGen/AMDGPU/atomic_optimization_split_dt_update.ll -CodeGen/AMDGPU/atomic-optimizer-promote-i8.ll -CodeGen/AMDGPU/attributor-flatscratchinit.ll -CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll -CodeGen/AMDGPU/global-atomic-scan.ll -CodeGen/AMDGPU/global_atomics_iterative_scan_fp.ll -CodeGen/AMDGPU/global_atomics_iterative_scan.ll -CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll -CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll -CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll -CodeGen/AMDGPU/lower-ctor-dtor.ll -CodeGen/AMDGPU/lower-intrinsics-cluster-barrier.ll -CodeGen/AMDGPU/lower-mem-intrinsics.ll -CodeGen/AMDGPU/lower-mem-intrinsics-threshold.ll -CodeGen/AMDGPU/opencl-printf-and-hostcall.ll -CodeGen/AMDGPU/opencl-printf.ll -CodeGen/AMDGPU/opencl-printf-pipeline.ll -CodeGen/AMDGPU/printf_builtin.ll -CodeGen/AMDGPU/printf-existing-format-strings.ll -CodeGen/AMDGPU/printf_nobuiltin.ll -CodeGen/AMDGPU/private-memory-atomics.ll -CodeGen/AMDGPU/si-annotate-nested-control-flows.ll -CodeGen/AMDGPU/simple-indirect-call-2.ll CodeGen/ARM/loopvectorize_pr33804.ll CodeGen/ARM/sjljeh-swifterror.ll CodeGen/Hexagon/autohvx/interleave.ll @@ -81,56 +21,12 @@ CodeGen/X86/nocfivalue.ll DebugInfo/AArch64/ir-outliner.ll DebugInfo/assignment-tracking/X86/hotcoldsplit.ll DebugInfo/Generic/block-asan.ll -DebugInfo/KeyInstructions/Generic/loop-unswitch.ll DebugInfo/X86/asan_debug_info.ll LTO/X86/diagnostic-handler-remarks-with-hotness.ll Other/optimization-remarks-auto.ll Other/X86/debugcounter-partiallyinlinelibcalls.ll -Transforms/AtomicExpand/AArch64/atomicrmw-fp.ll -Transforms/AtomicExpand/AArch64/expand-atomicrmw-xchg-fp.ll -Transforms/AtomicExpand/AArch64/pcsections.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-i16-system.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-i32-agent.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-i32-system.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-i64-agent.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-i64-system.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-i8.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-i8-system.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-private-gas.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd-flat-specialization-preserve-name.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll -Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-flat-noalias-addrspace.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmax.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fmin.ll -Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-fp-vector.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fsub.ll -Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-integer-ops-0-to-add-0.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-nand.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-simplify-cfg-CAS-block.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-agent.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-system.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-agent.ll -Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-system.ll -Transforms/AtomicExpand/AMDGPU/expand-cmpxchg-flat-maybe-private.ll Transforms/AtomicExpand/ARM/atomic-expansion-v7.ll -Transforms/AtomicExpand/ARM/atomic-expansion-v8.ll -Transforms/AtomicExpand/ARM/atomicrmw-fp.ll -Transforms/AtomicExpand/Hexagon/atomicrmw-fp.ll -Transforms/AtomicExpand/LoongArch/atomicrmw-fp.ll -Transforms/AtomicExpand/Mips/atomicrmw-fp.ll -Transforms/AtomicExpand/PowerPC/atomicrmw-fp.ll -Transforms/AtomicExpand/RISCV/atomicrmw-fp.ll -Transforms/AtomicExpand/SPARC/libcalls.ll Transforms/AtomicExpand/SPARC/partword.ll -Transforms/AtomicExpand/X86/expand-atomic-rmw-fp.ll -Transforms/AtomicExpand/X86/expand-atomic-rmw-initial-load.ll -Transforms/AtomicExpand/X86/expand-atomic-xchg-fp.ll Transforms/Attributor/align.ll Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll Transforms/Attributor/ArgumentPromotion/2008-07-02-array-indexing.ll @@ -243,8 +139,6 @@ Transforms/CorrelatedValuePropagation/urem.ll Transforms/CrossDSOCFI/basic.ll Transforms/CrossDSOCFI/cfi_functions.ll Transforms/CrossDSOCFI/thumb.ll -Transforms/ExpandFp/AMDGPU/frem-inf.ll -Transforms/ExpandFp/AMDGPU/frem.ll Transforms/ExpandLargeDivRem/X86/sdiv129.ll Transforms/ExpandLargeDivRem/X86/srem129.ll Transforms/ExpandLargeDivRem/X86/udiv129.ll @@ -347,18 +241,17 @@ Transforms/InstCombine/AArch64/sve-intrinsic-simplify-binop.ll Transforms/InstCombine/AArch64/sve-intrinsic-simplify-shift.ll Transforms/InstCombine/add-mask.ll Transforms/InstCombine/add-shl-mul-umax.ll -Transforms/InstCombine/AMDGPU/addrspacecast.ll Transforms/InstCombine/and2.ll Transforms/InstCombine/and-fcmp.ll Transforms/InstCombine/and.ll Transforms/InstCombine/and-or-icmps.ll -Transforms/InstCombine/and-or-implied-cond-not.ll Transforms/InstCombine/apint-div1.ll Transforms/InstCombine/apint-div2.ll Transforms/InstCombine/ashr-demand.ll Transforms/InstCombine/atomic.ll Transforms/InstCombine/binop-cast.ll Transforms/InstCombine/binop-select-cast-of-select-cond.ll +Transforms/InstCombine/binop-select.ll Transforms/InstCombine/bit-checks.ll Transforms/InstCombine/bitreverse.ll Transforms/InstCombine/branch.ll @@ -384,7 +277,6 @@ Transforms/InstCombine/fold-ctpop-of-not.ll Transforms/InstCombine/fold-ext-eq-c-with-op.ll Transforms/InstCombine/free-inversion.ll Transforms/InstCombine/icmp-and-lowbit-mask.ll -Transforms/InstCombine/icmp-equality-test.ll Transforms/InstCombine/icmp.ll Transforms/InstCombine/icmp-mul-and.ll Transforms/InstCombine/icmp-of-and-x.ll @@ -393,7 +285,6 @@ Transforms/InstCombine/icmp-select-implies-common-op.ll Transforms/InstCombine/icmp-select.ll Transforms/InstCombine/icmp-with-selects.ll Transforms/InstCombine/intrinsic-select.ll -Transforms/InstCombine/known-never-nan.ll Transforms/InstCombine/ldexp-ext.ll Transforms/InstCombine/ldexp.ll Transforms/InstCombine/load-bitcast-select.ll @@ -433,13 +324,11 @@ Transforms/InstCombine/or.ll Transforms/InstCombine/pow-1.ll Transforms/InstCombine/pow-3.ll Transforms/InstCombine/pow-sqrt.ll -Transforms/InstCombine/pr24354.ll Transforms/InstCombine/pull-conditional-binop-through-shift.ll Transforms/InstCombine/rem.ll Transforms/InstCombine/sdiv-canonicalize.ll Transforms/InstCombine/sdiv-guard.ll Transforms/InstCombine/select-and-or.ll -Transforms/InstCombine/select-bitext.ll Transforms/InstCombine/select-cmp-br.ll Transforms/InstCombine/select-cmp.ll Transforms/InstCombine/select-factorize.ll @@ -448,7 +337,6 @@ Transforms/InstCombine/select.ll Transforms/InstCombine/select-min-max.ll Transforms/InstCombine/select-of-symmetric-selects.ll Transforms/InstCombine/select-select.ll -Transforms/InstCombine/select-with-extreme-eq-cond.ll Transforms/InstCombine/shift.ll Transforms/InstCombine/shuffle-select-narrow-inseltpoison.ll Transforms/InstCombine/shuffle-select-narrow.ll @@ -598,66 +486,12 @@ Transforms/LoopBoundSplit/bug51866.ll Transforms/LoopBoundSplit/bug-loop-bound-split-phi-in-exit-block.ll Transforms/LoopBoundSplit/loop-bound-split.ll Transforms/LoopDeletion/invalidate-scev-after-hoisting.ll -Transforms/LoopDistribute/basic-with-memchecks.ll -Transforms/LoopDistribute/bounds-expansion-bug.ll -Transforms/LoopDistribute/cross-partition-access.ll -Transforms/LoopDistribute/debug-loc.ll -Transforms/LoopDistribute/debug-print.ll -Transforms/LoopDistribute/diagnostics.ll -Transforms/LoopDistribute/followup.ll -Transforms/LoopDistribute/laa-invalidation.ll -Transforms/LoopDistribute/outside-use.ll -Transforms/LoopDistribute/pointer-phi-in-loop.ll -Transforms/LoopDistribute/scev-inserted-runtime-check.ll -Transforms/LoopDistribute/symbolic-stride.ll -Transforms/LoopFlatten/loop-flatten-version.ll Transforms/LoopIdiom/AArch64/byte-compare-index.ll Transforms/LoopIdiom/AArch64/find-first-byte.ll Transforms/LoopIdiom/RISCV/byte-compare-index.ll -Transforms/LoopIdiom/X86/arithmetic-right-shift-until-zero.ll -Transforms/LoopIdiom/X86/left-shift-until-bittest.ll -Transforms/LoopIdiom/X86/left-shift-until-zero.ll -Transforms/LoopIdiom/X86/logical-right-shift-until-zero-debuginfo.ll -Transforms/LoopIdiom/X86/logical-right-shift-until-zero.ll -Transforms/LoopLoadElim/forward.ll -Transforms/LoopLoadElim/invalidate-laa-after-versioning.ll -Transforms/LoopLoadElim/memcheck.ll -Transforms/LoopLoadElim/pr47457.ll -Transforms/LoopLoadElim/symbolic-stride.ll -Transforms/LoopLoadElim/unknown-stride-known-dep.ll -Transforms/LoopLoadElim/versioning-scev-invalidation.ll -Transforms/LoopPredication/preserve-bpi.ll -Transforms/LoopSimplifyCFG/constant-fold-branch.ll -Transforms/LoopSimplifyCFG/handle_dead_exits.ll -Transforms/LoopSimplifyCFG/invalidate-scev-dispositions-2.ll -Transforms/LoopSimplifyCFG/invalidate-scev-dispositions.ll -Transforms/LoopSimplifyCFG/lcssa.ll -Transforms/LoopSimplifyCFG/live_block_marking.ll -Transforms/LoopSimplifyCFG/mssa_update.ll -Transforms/LoopSimplifyCFG/pr117537.ll -Transforms/LoopSimplifyCFG/update_parents.ll Transforms/LoopUnroll/peel-last-iteration-expansion-cost.ll Transforms/LoopUnroll/peel-last-iteration-with-guards.ll Transforms/LoopUnroll/peel-last-iteration-with-variable-trip-count.ll -Transforms/LoopUnroll/runtime-loop-multiple-exits.ll -Transforms/LoopVersioning/add-phi-update-users.ll -Transforms/LoopVersioning/basic.ll -Transforms/LoopVersioning/bound-check-partially-known.ll -Transforms/LoopVersioning/crash-36998.ll -Transforms/LoopVersioning/exit-block-dominates-rt-check-block.ll -Transforms/LoopVersioning/incorrect-phi.ll -Transforms/LoopVersioning/invalidate-laa-after-versioning.ll -Transforms/LoopVersioning/lcssa.ll -Transforms/LoopVersioningLICM/load-from-unknown-address.ll -Transforms/LoopVersioningLICM/loopversioningLICM1.ll -Transforms/LoopVersioningLICM/loopversioningLICM2.ll -Transforms/LoopVersioningLICM/metadata.ll -Transforms/LoopVersioning/loop-invariant-bound.ll -Transforms/LoopVersioning/noalias.ll -Transforms/LoopVersioning/noalias-version-twice.ll -Transforms/LoopVersioning/single-iteration.ll -Transforms/LoopVersioning/wrapping-pointer-non-integral-addrspace.ll -Transforms/LoopVersioning/wrapping-pointer-versioning.ll Transforms/LowerAtomic/atomic-load.ll Transforms/LowerAtomic/atomic-swap.ll Transforms/LowerConstantIntrinsics/builtin-object-size-phi.ll @@ -813,10 +647,6 @@ Transforms/SandboxVectorizer/special_opcodes.ll Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-load.ll Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-store.ll Transforms/ScalarizeMaskedMemIntrin/AArch64/streaming-compatible-expand-masked-gather-scatter.ll -Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expamd-masked-load.ll -Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-gather.ll -Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-scatter.ll -Transforms/ScalarizeMaskedMemIntrin/AMDGPU/expand-masked-store.ll Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-compressstore.ll Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-expandload.ll Transforms/ScalarizeMaskedMemIntrin/X86/expand-masked-gather.ll @@ -830,29 +660,7 @@ Transforms/Scalarizer/scatter-order.ll Transforms/Scalarizer/variable-extractelement.ll Transforms/Scalarizer/variable-insertelement.ll Transforms/Scalarizer/vector-of-pointer-to-vector.ll -Transforms/SimpleLoopUnswitch/debuginfo.ll -Transforms/SimpleLoopUnswitch/delete-dead-blocks.ll -Transforms/SimpleLoopUnswitch/endless-unswitch.ll -Transforms/SimpleLoopUnswitch/guards.ll -Transforms/SimpleLoopUnswitch/inject-invariant-conditions-exponential.ll -Transforms/SimpleLoopUnswitch/inject-invariant-conditions.ll -Transforms/SimpleLoopUnswitch/LIV-loop-condtion.ll -Transforms/SimpleLoopUnswitch/nontrivial-unswitch-freeze.ll -Transforms/SimpleLoopUnswitch/nontrivial-unswitch.ll -Transforms/SimpleLoopUnswitch/nontrivial-unswitch-select.ll -Transforms/SimpleLoopUnswitch/nontrivial-unswitch-skip-selects-in-guards.ll -Transforms/SimpleLoopUnswitch/partial-unswitch.ll -Transforms/SimpleLoopUnswitch/partial-unswitch-loop-and-block-dispositions.ll -Transforms/SimpleLoopUnswitch/partial-unswitch-mssa-threshold.ll -Transforms/SimpleLoopUnswitch/partial-unswitch-update-memoryssa.ll -Transforms/SimpleLoopUnswitch/pr138509.ll -Transforms/SimpleLoopUnswitch/pr59546.ll -Transforms/SimpleLoopUnswitch/pr60736.ll -Transforms/SimpleLoopUnswitch/trivial-unswitch-freeze-individual-conditions.ll -Transforms/SimpleLoopUnswitch/trivial-unswitch.ll -Transforms/SimpleLoopUnswitch/trivial-unswitch-logical-and-or.ll Transforms/StackProtector/cross-dso-cfi-stack-chk-fail.ll -Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll Transforms/StructurizeCFG/callbr.ll Transforms/StructurizeCFG/hoist-zerocost.ll Transforms/StructurizeCFG/loop-break-phi.ll