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Fix jump to next instruction instead of memory value in LDM/LDMIA/LDMDB THUMB instructions
1 parent 3f53333 commit 8b40376

2 files changed

Lines changed: 7 additions & 4 deletions

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‎arch/armv7/test_lift.py‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -777,8 +777,8 @@ def vmlal_expected(size, unsigned):
777777
('T', b'\xd1\xe8\x5f\x0f', 'LLIL_INTRINSIC([],SetExclusiveMonitors,[LLIL_REG.d(r1),LLIL_CONST.b(0x2)]); LLIL_SET_REG.d(r0,LLIL_ZX.d(LLIL_LOAD.w(LLIL_REG.d(r1))))'),
778778
# ldrexd r2, r3, [r4]
779779
('T', b'\xd4\xe8\x7f\x23', 'LLIL_INTRINSIC([],SetExclusiveMonitors,[LLIL_REG.d(r4),LLIL_CONST.b(0x8)]); LLIL_SET_REG.d(r2,LLIL_LOAD.d(LLIL_REG.d(r4))); LLIL_SET_REG.d(r3,LLIL_LOAD.d(LLIL_ADD.d(LLIL_REG.d(r4),LLIL_CONST.d(0x4))))'),
780-
# ldm.w r0!, {r1, pc}; followed by an ARM return fence for the arch-transition target
781-
('T', b'\xb0\xe8\x02\x80\x0e\xf0\xa0\xe1', 'LLIL_SET_REG.d(temp0,LLIL_REG.d(r0)); LLIL_SET_REG.d(r1,LLIL_LOAD.d(LLIL_ADD.d(LLIL_REG.d(temp0),LLIL_CONST.d(0x0)))); LLIL_SET_REG.d(pc,LLIL_LOAD.d(LLIL_ADD.d(LLIL_REG.d(temp0),LLIL_CONST.d(0x4)))); LLIL_SET_REG.d(r0,LLIL_ADD.d(LLIL_REG.d(r0),LLIL_CONST.d(0x8))); LLIL_JUMP_TO(LLIL_CONST.d(0x4),{4: 6})'),
780+
# ldm.w r0!, {r1, pc}
781+
('T', b'\xb0\xe8\x02\x80', 'LLIL_SET_REG.d(temp0,LLIL_REG.d(r0)); LLIL_SET_REG.d(r1,LLIL_LOAD.d(LLIL_ADD.d(LLIL_REG.d(temp0),LLIL_CONST.d(0x0)))); LLIL_SET_REG.d(temp1,LLIL_LOAD.d(LLIL_ADD.d(LLIL_REG.d(temp0),LLIL_CONST.d(0x4)))); LLIL_SET_REG.d(r0,LLIL_ADD.d(LLIL_REG.d(r0),LLIL_CONST.d(0x8))); LLIL_JUMP(LLIL_REG.d(temp1))'),
782782
# ldaexb r3, [r4]
783783
('T', b'\xd4\xe8\xcf\x3f', 'LLIL_INTRINSIC([],SetExclusiveMonitors,[LLIL_REG.d(r4),LLIL_CONST.b(0x1)]); LLIL_SET_REG.d(r3,LLIL_ZX.d(LLIL_LOAD.b(LLIL_REG.d(r4))))'),
784784
# ldaexh r2, [r5]

‎arch/armv7/thumb2_disasm/il_thumb2.cpp‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2818,7 +2818,10 @@ bool GetLowLevelILForThumbInstruction(Architecture* arch, LowLevelILFunction& il
28182818
{
28192819
if ((regs >> i) & 1)
28202820
{
2821-
il.AddInstruction(il.SetRegister(4, GetRegisterByIndex(i),
2821+
uint32_t dest = GetRegisterByIndex(i);
2822+
if (dest == armv7::REG_PC)
2823+
dest = LLIL_TEMP(1);
2824+
il.AddInstruction(il.SetRegister(4, dest,
28222825
il.Load(4, il.Add(4, il.Register(4, LLIL_TEMP(0)), il.Const(4, 4 * slot++)))));
28232826
}
28242827
}
@@ -2833,7 +2836,7 @@ bool GetLowLevelILForThumbInstruction(Architecture* arch, LowLevelILFunction& il
28332836
}
28342837

28352838
if (regs & (1 << armv7::REG_PC))
2836-
il.AddInstruction(il.Jump(ReadRegister(il, instr, armv7::REG_PC, 4)));
2839+
il.AddInstruction(il.Jump(il.Register(4, LLIL_TEMP(1))));
28372840
break;
28382841
}
28392842
case armv7::ARMV7_LDA:

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