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fix: Warnings and formatting all fixed
1 parent d453765 commit 05417e9

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3 files changed

+45
-15
lines changed

3 files changed

+45
-15
lines changed

embassy-stm32/src/timer/low_level.rs

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -812,8 +812,6 @@ impl<'d, T: GeneralInstance4Channel> Timer<'d, T> {
812812
/// You may want to start this in a new thread as this will block forever
813813
814814
pub async fn waveform_continuous<C: TimerChannel>(&mut self, dma: Peri<'_, impl super::Dma<T, C>>, duty: &[u16]) {
815-
816-
817815
use crate::pac::timer::vals::Ccds;
818816

819817
#[allow(clippy::let_unit_value)] // eg. stm32f334
@@ -855,7 +853,7 @@ impl<'d, T: GeneralInstance4Channel> Timer<'d, T> {
855853
req: dma::Request,
856854
channel: Channel,
857855
duty: &[u16],
858-
circular: bool,
856+
#[allow(unused_variables)] circular: bool,
859857
) {
860858
let original_duty_state = self.get_compare_value(channel);
861859
let original_enable_state = self.get_channel_enable_state(channel);

embassy-stm32/src/timer/ringbuffered.rs

Lines changed: 21 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5,17 +5,36 @@ use core::task::Waker;
55

66
use super::low_level::Timer;
77
use super::{Channel, GeneralInstance4Channel};
8-
use crate::dma::ringbuffer::Error;
98
use crate::dma::WritableRingBuffer;
9+
use crate::dma::ringbuffer::Error;
1010

11+
/// A PWM channel that uses a DMA ring buffer for continuous waveform generation.
12+
///
13+
/// This allows you to continuously update PWM duty cycles via DMA without blocking the CPU.
14+
/// The ring buffer enables smooth, uninterrupted waveform generation by automatically cycling
15+
/// through duty cycle values stored in memory.
16+
///
17+
/// You can write new duty cycle values to the ring buffer while it's running, enabling
18+
/// dynamic waveform generation for applications like motor control, LED dimming, or audio output.
19+
///
20+
/// # Example
21+
/// ```ignore
22+
/// let mut channel = pwm.ch1().into_ring_buffered_channel(dma_ch, &mut buffer);
23+
/// channel.start(); // Start DMA transfer
24+
/// channel.write(&[100, 200, 300]).ok(); // Update duty cycles
25+
/// ```
1126
pub struct RingBufferedPwmChannel<'d, T: GeneralInstance4Channel> {
1227
timer: ManuallyDrop<Timer<'d, T>>,
1328
ring_buf: WritableRingBuffer<'d, u16>,
1429
channel: Channel,
1530
}
1631

1732
impl<'d, T: GeneralInstance4Channel> RingBufferedPwmChannel<'d, T> {
18-
pub(crate) fn new(timer: ManuallyDrop<Timer<'d, T>>, channel: Channel, ring_buf: WritableRingBuffer<'d, u16>) -> Self {
33+
pub(crate) fn new(
34+
timer: ManuallyDrop<Timer<'d, T>>,
35+
channel: Channel,
36+
ring_buf: WritableRingBuffer<'d, u16>,
37+
) -> Self {
1938
Self {
2039
timer,
2140
ring_buf,
@@ -148,5 +167,3 @@ pub struct RingBufferedPwmChannels<'d, T: GeneralInstance4Channel> {
148167
/// Channel 4
149168
pub ch4: RingBufferedPwmChannel<'d, T>,
150169
}
151-
152-

embassy-stm32/src/timer/simple_pwm.rs

Lines changed: 23 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,11 @@ use core::mem::ManuallyDrop;
66
use super::low_level::{CountingMode, OutputCompareMode, OutputPolarity, Timer};
77
use super::ringbuffered::RingBufferedPwmChannel;
88
use super::{Ch1, Ch2, Ch3, Ch4, Channel, GeneralInstance4Channel, TimerChannel, TimerPin};
9-
use crate::dma::WritableRingBuffer;
109
use crate::Peri;
10+
use crate::dma::TransferOptions;
11+
use crate::dma::WritableRingBuffer;
1112
#[cfg(not(any(bdma, gpdma)))]
1213
use crate::dma::{Burst, FifoThreshold};
13-
use crate::dma::TransferOptions;
1414
#[cfg(gpio_v2)]
1515
use crate::gpio::Pull;
1616
use crate::gpio::{AfType, AnyPin, OutputType, Speed};
@@ -379,9 +379,27 @@ impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
379379
pub async fn waveform_continuous<C: TimerChannel>(&mut self, dma: Peri<'_, impl super::Dma<T, C>>, duty: &[u16]) {
380380
self.inner.waveform_continuous(dma, duty).await;
381381
}
382-
pub fn into_ring_buffered_channel<C: TimerChannel>(self, tx_dma: Peri<'d, impl super::Dma<T, C>>, dma_buf: &'d mut [u16]) -> RingBufferedPwmChannel<'d, T> {
382+
383+
/// Convert this PWM channel into a ring-buffered PWM channel.
384+
///
385+
/// This allows continuous PWM waveform generation using a DMA ring buffer.
386+
/// The ring buffer enables dynamic updates to the PWM duty cycle without blocking.
387+
///
388+
/// # Arguments
389+
/// * `tx_dma` - The DMA channel to use for transferring duty cycle values
390+
/// * `dma_buf` - The buffer to use as a ring buffer (must be non-empty and <= 65535 elements)
391+
///
392+
/// # Panics
393+
/// Panics if `dma_buf` is empty or longer than 65535 elements.
394+
pub fn into_ring_buffered_channel<C: TimerChannel>(
395+
self,
396+
tx_dma: Peri<'d, impl super::Dma<T, C>>,
397+
dma_buf: &'d mut [u16],
398+
) -> RingBufferedPwmChannel<'d, T> {
383399
assert!(!dma_buf.is_empty() && dma_buf.len() <= 0xFFFF);
384400

401+
use crate::pac::timer::vals::Ccds;
402+
385403
let channel = C::CHANNEL;
386404
let request = tx_dma.request();
387405

@@ -393,6 +411,7 @@ impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
393411
..Default::default()
394412
};
395413

414+
self.inner.set_cc_dma_selection(Ccds::ON_UPDATE);
396415
let ring_buf = unsafe {
397416
WritableRingBuffer::new(
398417
tx_dma,
@@ -403,11 +422,7 @@ impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
403422
)
404423
};
405424

406-
RingBufferedPwmChannel::new(
407-
unsafe { self.inner.clone_unchecked() },
408-
channel,
409-
ring_buf
410-
)
425+
RingBufferedPwmChannel::new(unsafe { self.inner.clone_unchecked() }, channel, ring_buf)
411426
}
412427
}
413428

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