It seems like the M1 signal is pulled low during bus acknowledge, which would break DMA to IO devices, since they could interpret the I/O request as an interrupt acknowledge. I have no original Z80 on hand right now, but I checked using Z80 explorer that M1 should indeed be high when BUSACK goes low.
It seems like the M1 signal is pulled low during bus acknowledge, which would break DMA to IO devices, since they could interpret the I/O request as an interrupt acknowledge. I have no original Z80 on hand right now, but I checked using Z80 explorer that M1 should indeed be high when BUSACK goes low.