Bug fixes

Author: Josh Watson

__init__.py

@@ -2,14 +2,14 @@
 import binaryninja.binaryview
 import binaryninja.enums
 
-from .calling_convention import DefaultCallingConvention
+from .calling_convention import DefaultCallingConvention, StackBasedCallingConvention
 from .msp430 import MSP430
 
 MSP430.register()
 arch = binaryninja.architecture.Architecture['msp430']
 arch.register_calling_convention(DefaultCallingConvention(arch, 'default'))
-standalone = arch.standalone_platform
-standalone.default_calling_convention = arch.calling_conventions['default']
+arch.register_calling_convention(StackBasedCallingConvention(arch, 'stack_based'))
+arch.standalone_platform.default_calling_convention = arch.calling_conventions['default']
 binaryninja.binaryview.BinaryViewType['ELF'].register_arch(
     105,
     binaryninja.enums.Endianness.LittleEndian,

calling_convention.py

@@ -1,6 +1,13 @@
 from binaryninja import CallingConvention
 
 class DefaultCallingConvention(CallingConvention):
+    name = "Default"
     int_arg_regs = ['r15', 'r14', 'r13', 'r12']
     int_return_reg = 'r15'
     high_int_return_reg = 'r14'
+
+class StackBasedCallingConvention(CallingConvention):
+    name = "StackBased"
+    int_arg_regs = []
+    int_return_reg = 'r15'
+    high_int_return_reg = 'r14'

instructions.py

@@ -126,57 +126,6 @@
     'r15'
 ]
 
-
-def GetOperands(instr, instruction):
-    if instr in TYPE3_INSTRUCTIONS:
-        return None, OFFSET, None, None
-
-    width = 1 if (instruction & 0x40) >> 6 else 2
-
-    # As is in the same place for Type 1 and 2 instructions
-    As = (instruction & 0x30) >> 4
-
-    if instr in TYPE2_INSTRUCTIONS:
-        src = Registers[instruction & 0xf]
-        dst = None
-        Ad = None
-
-    elif instr in TYPE1_INSTRUCTIONS:
-        src = Registers[(instruction & 0xf00) >> 8]
-        dst = Registers[instruction & 0xf]
-        Ad = (instruction & 0x80) >> 7
-
-    if src == 'pc':
-        if As == INDEXED_MODE:
-            As = SYMBOLIC_MODE
-        elif As == INDIRECT_AUTOINCREMENT_MODE:
-            As = IMMEDIATE_MODE
-
-    elif src == 'cg':
-        if As == REGISTER_MODE:
-            As = CONSTANT_MODE0
-        elif As == INDEXED_MODE:
-            As = CONSTANT_MODE1
-        elif As == INDIRECT_REGISTER_MODE:
-            As = CONSTANT_MODE2
-        else:
-            As = CONSTANT_MODE_NEG1
-
-    elif src == 'sr':
-        if As == INDEXED_MODE:
-            As = ABSOLUTE_MODE
-        elif As == INDIRECT_REGISTER_MODE:
-            As = CONSTANT_MODE4
-        elif As == INDIRECT_AUTOINCREMENT_MODE:
-            As = CONSTANT_MODE8
-
-    if dst and dst == 'sr':
-        if Ad == INDEXED_MODE:
-            Ad = ABSOLUTE_MODE
-
-    return src, As, dst, Ad, width
-
-
 OperandTokens = [
     lambda reg, value: [    # REGISTER_MODE
         InstructionTextToken(InstructionTextTokenType.RegisterToken, reg)
@@ -236,19 +185,6 @@ def GetOperands(instr, instruction):
 ]
 
 
-def GetRegisterValues(instr, instruction):
-    if instr in TYPE1_INSTRUCTIONS:
-        src = (instruction & 0xf00) >> 8
-        dst = (instruction & 0xf)
-    elif instr in TYPE2_INSTRUCTIONS:
-        src = instruction & 0xf
-        dst = None
-    else:
-        src = None
-        dst = None
-
-    return src, dst
-
 class Operand:
     def __init__(
         self,

lifter.py

@@ -213,7 +213,7 @@ def lift_and(il, instr):
     @staticmethod
     def lift_bic(il, instr):
         left = SourceOperandsIL[instr.dst.mode](
-            il, instr.dst
+            il, instr.dst.width, instr.dst.target, instr.dst.value
         )
 
         right = il.not_expr(
@@ -484,6 +484,7 @@ def lift_rrc(il, instr):
             2,
             left,
             right,
+            il.flag('c'),
             flags='*'
         )
 
@@ -497,7 +498,7 @@ def lift_rrc(il, instr):
 
     @staticmethod
     def lift_sub(il, instr):
-        sub = Lifter.lift_type1(il, il.sub, instr.src, instr.dst, flags='*')
+        sub = Lifter.lift_type1(il, il.sub, instr.dst, instr.src, flags='*')
 
         il.append(
             DestOperandsIL[instr.dst.mode](