flip-link breaks "zero-init-ram" feature of cortex-m-rt

[showier-drastic]

As a background, the zero-init-ram feature of cortex-m-rt crate intends to clear the whole RAM in init script. This is necessary, for example, when SRAM Parity is enabled. It is implemented here.

After enabling "flip-link", ldr r0, =_ram_start does not seem to get the correct RAM start address, and this leads to incomplete cleaning of RAM.

A simple demonstration of this problem can be reproduced with the embassy built-in examples, described below:

1. clone the embassy repo: https://github.com/embassy-rs/embassy.git
2. cd examples/stm32g0
3. Patch Cargo.toml to add the feature:

diff --git a/examples/stm32g0/Cargo.toml b/examples/stm32g0/Cargo.toml
index 319d84179..1d0712dbc 100644
--- a/examples/stm32g0/Cargo.toml
+++ b/examples/stm32g0/Cargo.toml
@@ -17,7 +17,7 @@ defmt = "0.3"
 defmt-rtt = "0.4"

 cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-single-core"] }
-cortex-m-rt = "0.7.0"
+cortex-m-rt = { version = "0.7.0", features = ["zero-init-ram"] }
 embedded-hal = "0.2.6"
 panic-probe = { version = "0.3", features = ["print-defmt"] }
 heapless = { version = "0.8", default-features = false }

4. cargo build --release --bin blinky
5. Check the output file without flip-link, we can see that it successfully obtains the correct start and end address of RAM:

6. Patch .cargo/config.toml to enable flip-link:

diff --git a/examples/stm32g0/.cargo/config.toml b/examples/stm32g0/.cargo/config.toml
index f395d8920..c33042562 100644
--- a/examples/stm32g0/.cargo/config.toml
+++ b/examples/stm32g0/.cargo/config.toml
@@ -1,6 +1,7 @@
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
 # replace STM32G0B1RETx with your chip as listed in `probe-rs chip list`
 runner = "probe-rs run --chip STM32G0B1RETx"
+linker = "flip-link"

 [build]
 target = "thumbv6m-none-eabi"

7. Run cargo build --release --bin blinky again
8. Check again, now the whole RAM is not zeroed, only part of it is zeroed: