[SPIR-V] Fix missing DerivativeGroup executionMode (#7981)

GroupNonUniformQuadSwap and QuadBroadcast operate on quad scope
instances, hence we must emit the DerivativeGroup*KHR execution mode
when those instructions are present.

Fixes #7943

Author: Keenuts

tools/clang/lib/SPIRV/SpirvEmitter.cpp

@@ -10707,6 +10707,7 @@ SpirvEmitter::processWaveQuadWideShuffle(const CallExpr *callExpr,
     llvm_unreachable("case should not appear here");
   }
 
+  addDerivativeGroupExecutionMode();
   return spvBuilder.createGroupNonUniformOp(
       opcode, retType, spv::Scope::Subgroup, {value, target}, srcLoc);
 }
@@ -10725,6 +10726,8 @@ SpirvInstruction *SpirvEmitter::processWaveQuadAnyAll(const CallExpr *callExpr,
   auto *predicate = doExpr(callExpr->getArg(0));
   const auto srcLoc = callExpr->getExprLoc();
 
+  addDerivativeGroupExecutionMode();
+
   if (!featureManager.isExtensionEnabled(Extension::KHR_quad_control)) {
     // We can't use QuadAny/QuadAll, so implement them using QuadSwap. We
     // will read the value at each quad invocation, then combine them.

tools/clang/test/CodeGenSPIRV/sm6.quad-any-all.hlsl

@@ -1,12 +1,17 @@
 // RUN: %dxc -T cs_6_0 -E main -fspv-target-env=vulkan1.1 -fcgl  %s -spirv | FileCheck %s --check-prefixes=CHECK,QUAD
-// RUN: %dxc -T cs_6_0 -E main -fspv-target-env=vulkan1.1 -fspv-extension=SPV_KHR_16bit_storage -fcgl  %s -spirv | FileCheck %s --check-prefixes=CHECK,NOQUAD
+// RUN: %dxc -T cs_6_0 -E main -fspv-target-env=vulkan1.1 -fspv-extension=SPV_KHR_16bit_storage -fspv-extension=SPV_KHR_compute_shader_derivatives -fcgl  %s -spirv | FileCheck %s --check-prefixes=CHECK,NOQUAD
 // RUN: not %dxc -T cs_6_0 -E main -fspv-target-env=vulkan1.0 -fcgl  %s -spirv 2>&1 | FileCheck %s --check-prefixes=ERROR
 
 // CHECK: ; Version: 1.3
 
-// QUAD: OpCapability QuadControlKHR
+// CHECK-DAG: OpCapability ComputeDerivativeGroupQuadsKHR
+// CHECK-DAG: OpCapability ComputeDerivativeGroupLinearKHR
+// QUAD-DAG:  OpCapability QuadControlKHR
+
 // QUAD: OpExtension "SPV_KHR_quad_control"
 
+// CHECK: OpExecutionMode %main DerivativeGroupLinearKHR
+
 RWStructuredBuffer<float3> values;
 
 [numthreads(32, 1, 1)]
@@ -23,7 +28,7 @@ void main(uint3 id: SV_DispatchThreadID) {
 // NOQUAD-NEXT: [[inv2:%[0-9]+]] = OpGroupNonUniformQuadSwap %bool %uint_3 [[val1]] %uint_2
 // NOQUAD-NEXT:  [[or2:%[0-9]+]] = OpLogicalOr %bool [[or1]] [[inv2]]
 
-// ERROR: 27:24: error: Vulkan 1.1 is required for Wave Operation but not permitted to use
+// ERROR: 32:24: error: Vulkan 1.1 is required for Wave Operation but not permitted to use
     values[outIdx].x = QuadAny(outIdx % 4 == 0) ? 1.0 : 2.0;
 
 // CHECK:        [[val2:%[0-9]+]] = OpIEqual %bool {{%[0-9]+}}
@@ -36,6 +41,6 @@ void main(uint3 id: SV_DispatchThreadID) {
 // NOQUAD-NEXT: [[inv2:%[0-9]+]] = OpGroupNonUniformQuadSwap %bool %uint_3 [[val2]] %uint_2
 // NOQUAD-NEXT:  [[or2:%[0-9]+]] = OpLogicalAnd %bool [[or1]] [[inv2]]
 
-// ERROR: 40:24: error: Vulkan 1.1 is required for Wave Operation but not permitted to use
+// ERROR: 45:24: error: Vulkan 1.1 is required for Wave Operation but not permitted to use
     values[outIdx].y = QuadAll(outIdx % 2 == 0) ? 3.0 : 4.0;
 }

tools/clang/test/CodeGenSPIRV/sm6.quad-read-across-diagonal.hlsl

@@ -10,7 +10,10 @@ struct S {
 
 RWStructuredBuffer<S> values;
 
-// CHECK: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability ComputeDerivativeGroupQuadsKHR
+// CHECK-DAG: OpCapability ComputeDerivativeGroupLinearKHR
+// CHECK-DAG: OpExecutionMode %main DerivativeGroupLinearKHR
 
 [numthreads(32, 1, 1)]
 void main(uint3 id: SV_DispatchThreadID) {

tools/clang/test/CodeGenSPIRV/sm6.quad-read-across-diagonal.vulkan1.2.hlsl

@@ -10,7 +10,10 @@ struct S {
 
 RWStructuredBuffer<S> values;
 
-// CHECK: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability ComputeDerivativeGroupQuadsKHR
+// CHECK-DAG: OpCapability ComputeDerivativeGroupLinearKHR
+// CHECK-DAG: OpExecutionMode %main DerivativeGroupLinearKHR
 
 [numthreads(32, 1, 1)]
 void main(uint3 id: SV_DispatchThreadID) {

tools/clang/test/CodeGenSPIRV/sm6.quad-read-across-x.hlsl

@@ -10,7 +10,10 @@ struct S {
 
 RWStructuredBuffer<S> values;
 
-// CHECK: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability ComputeDerivativeGroupQuadsKHR
+// CHECK-DAG: OpCapability ComputeDerivativeGroupLinearKHR
+// CHECK-DAG: OpExecutionMode %main DerivativeGroupLinearKHR
 
 [numthreads(32, 1, 1)]
 void main(uint3 id: SV_DispatchThreadID) {

tools/clang/test/CodeGenSPIRV/sm6.quad-read-across-x.vulkan1.2.hlsl

@@ -10,7 +10,10 @@ struct S {
 
 RWStructuredBuffer<S> values;
 
-// CHECK: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability ComputeDerivativeGroupQuadsKHR
+// CHECK-DAG: OpCapability ComputeDerivativeGroupLinearKHR
+// CHECK-DAG: OpExecutionMode %main DerivativeGroupLinearKHR
 
 [numthreads(32, 1, 1)]
 void main(uint3 id: SV_DispatchThreadID) {

tools/clang/test/CodeGenSPIRV/sm6.quad-read-across-y.hlsl

@@ -10,7 +10,10 @@ struct S {
 
 RWStructuredBuffer<S> values;
 
-// CHECK: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability ComputeDerivativeGroupQuadsKHR
+// CHECK-DAG: OpCapability ComputeDerivativeGroupLinearKHR
+// CHECK-DAG: OpExecutionMode %main DerivativeGroupLinearKHR
 
 [numthreads(32, 1, 1)]
 void main(uint3 id: SV_DispatchThreadID) {

tools/clang/test/CodeGenSPIRV/sm6.quad-read-across-y.vulkan1.2.hlsl

@@ -10,7 +10,10 @@ struct S {
 
 RWStructuredBuffer<S> values;
 
-// CHECK: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability ComputeDerivativeGroupQuadsKHR
+// CHECK-DAG: OpCapability ComputeDerivativeGroupLinearKHR
+// CHECK-DAG: OpExecutionMode %main DerivativeGroupLinearKHR
 
 [numthreads(32, 1, 1)]
 void main(uint3 id: SV_DispatchThreadID) {

tools/clang/test/CodeGenSPIRV/sm6.quad-read-lane-at.hlsl

@@ -10,7 +10,10 @@ struct S {
 
 RWStructuredBuffer<S> values;
 
-// CHECK: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability ComputeDerivativeGroupQuadsKHR
+// CHECK-DAG: OpCapability ComputeDerivativeGroupLinearKHR
+// CHECK-DAG: OpExecutionMode %main DerivativeGroupLinearKHR
 
 [numthreads(32, 1, 1)]
 void main(uint3 id: SV_DispatchThreadID) {

tools/clang/test/CodeGenSPIRV/sm6.quad-read-lane-at.quad.vulkan1.2.hlsl

@@ -0,0 +1,35 @@
+// RUN: %dxc -T cs_6_0 -E main -fspv-target-env=vulkan1.2 -fcgl  %s -spirv | FileCheck %s
+
+// CHECK: ; Version: 1.5
+
+struct S {
+    float4 val1;
+     uint3 val2;
+       int val3;
+};
+
+RWStructuredBuffer<S> values;
+
+// CHECK-DAG: OpCapability GroupNonUniformQuad
+// CHECK-DAG: OpCapability ComputeDerivativeGroupQuadsKHR
+// CHECK-DAG: OpCapability ComputeDerivativeGroupLinearKHR
+// CHECK-DAG: OpExecutionMode %main DerivativeGroupQuadsKHR
+
+[numthreads(2, 2, 1)]
+void main(uint3 id: SV_DispatchThreadID) {
+    uint x = id.x;
+
+    float4 val1 = values[x].val1;
+     uint3 val2 = values[x].val2;
+       int val3 = values[x].val3;
+
+// CHECK:      [[val1:%[0-9]+]] = OpLoad %v4float %val1
+// CHECK-NEXT:      {{%[0-9]+}} = OpGroupNonUniformQuadBroadcast %v4float %uint_3 [[val1]] %uint_0
+    values[x].val1 = QuadReadLaneAt(val1, 0);
+// CHECK:      [[val2:%[0-9]+]] = OpLoad %v3uint %val2
+// CHECK-NEXT:      {{%[0-9]+}} = OpGroupNonUniformQuadBroadcast %v3uint %uint_3 [[val2]] %uint_1
+    values[x].val2 = QuadReadLaneAt(val2, 1);
+// CHECK:      [[val3:%[0-9]+]] = OpLoad %int %val3
+// CHECK-NEXT:      {{%[0-9]+}} = OpGroupNonUniformQuadBroadcast %int %uint_3 [[val3]] %uint_2
+    values[x].val3 = QuadReadLaneAt(val3, 2);
+}