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fpga: ignore bufgmux in some cases
1 parent a9cae21 commit 6f43739

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+16
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src/fpga/tc_clk_xilinx.sv

Lines changed: 16 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -57,19 +57,28 @@ module tc_clk_inverter (
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endmodule
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60-
module tc_clk_mux2 (
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module tc_clk_mux2 #(
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/// Using BUFGMUX on FPGA can allocate limited clock ressources
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/// to non clock signals. It can be disabled with
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/// IS_FUNCTIONAL = 0
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parameter bit IS_FUNCTIONAL = 1'b0
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)(
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input logic clk0_i,
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input logic clk1_i,
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input logic clk_sel_i,
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output logic clk_o
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);
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67-
BUFGMUX i_BUFGMUX (
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.S ( clk_sel_i ),
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.I0 ( clk0_i ),
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.I1 ( clk1_i ),
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.O ( clk_o )
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);
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if (IS_FUNCTIONAL) begin
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BUFGMUX i_BUFGMUX (
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.S ( clk_sel_i ),
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.I0 ( clk0_i ),
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.I1 ( clk1_i ),
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.O ( clk_o )
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);
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end else begin
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assign clk_o = clk_sel_i ? clk1_i : clk0_i;
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end
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endmodule
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