Merge pull request #282 from Ken-Vamrs/main

cm5: update otg port overlay

Author: RadxaYuntian

arch/arm64/boot/dts/rockchip/overlays/Makefile

@@ -136,6 +136,7 @@ dtb-$(CONFIG_CLK_RK3568) += \
 	radxa-cm3-io-rpi-camera-v1p3-ov5647-cam1.dtbo \
 	radxa-cm3-io-rpi-camera-v1p3-ov5647-cam2.dtbo \
 	radxa-cm3-io-pcie2x1.dtbo \
+	radxa-cm3-radxa-taco-pcie2x1.dtbo \
 	radxa-cm3-raspcm4io-pcie2x1.dtbo \
 	radxa-cm3-rpi-cm4-7inch-touchscreen-disp0.dtbo \
 	radxa-cm3-rpi-cm4-7inch-touchscreen-disp1.dtbo \
@@ -414,6 +415,7 @@ dtb-$(CONFIG_CPU_RK3588) += \
 	radxa-cm5-io-okdo-5mp.dtbo \
 	radxa-cm5-io-radxa-display-8hd.dtbo \
 	radxa-cm5-io-radxa-camera-4k.dtbo \
+	radxa-cm5-io-radxa-camera-8m.dtbo \
 	radxa-cm5-io-radxa-display-10fhd.dtbo \
 	radxa-cm5-io-radxa-display-10hd.dtbo \
 	radxa-cm5-io-radxa-display-8hd.dtbo \

arch/arm64/boot/dts/rockchip/overlays/radxa-cm3-radxa-taco-pcie2x1.dts

@@ -0,0 +1,48 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+	metadata {
+		title = "Enable PCIe on Radxa Taco";
+		compatible = "radxa,cm3-io", "radxa,cm3-rpi-cm4-io";
+		category = "misc";
+		exclusive = "pcie2x1";
+		description = "Enable PCIe on Radxa Taco.\nWhen PCIe is enabled, SATA2 cannot be enabled on the same port.";
+	};
+};
+
+&{/} {
+	pcie2x1-en-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pcie2x1_en>;
+		regulator-name = "pcie2x1_en";
+		regulator-always-on;
+		regulator-boot-on;
+		status = "okay";
+	};
+};
+
+&pcie2x1 {
+	status = "okay";
+	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&vcc3v3_sys>;
+	pinctrl-0 = <&pcie20m2_pins>;
+};
+
+&sata2 {
+	status = "disabled";
+};
+
+&pinctrl {
+	pcie2x1_en_gpio{
+		pcie2x1_en: pcie2x1-en{
+			rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/radxa-cm5-io-radxa-camera-8m.dts

@@ -0,0 +1,178 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+	metadata {
+		title ="Enable Radxa Camera 8M 219 on CSI0";
+		compatible = "radxa,cm5-io";
+		category = "camera";
+		exclusive = "csi2_dphy0";
+		description = "Enable Radxa Camera 8M 219 on CSI0.";
+	};
+};
+
+&{/} {
+	camera_pwdn_gpio: camera-pwdn-gpio {
+		compatible = "regulator-fixed";
+		regulator-name = "camera_pwdn_gpio";
+		regulator-always-on;
+		regulator-boot-on;
+		enable-active-high;
+		gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cam_pwdn_gpio>;
+	};
+
+	clk_cam_24m: external-camera-clock-24m {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "clk_cam_24m";
+		#clock-cells = <0>;
+	};
+};
+
+&i2c7 {
+	status = "okay";
+	pinctrl-0 = <&i2c7m2_xfer>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	camera_imx219: camera-imx219@10 {
+		compatible = "sony,imx219";
+		reg = <0x10>;
+
+		clocks = <&clk_cam_24m>;
+		clock-names = "xvclk";
+
+		rockchip,camera-module-index = <1>;
+		rockchip,camera-module-facing = "front";
+		rockchip,camera-module-name = "RADXA-CAMERA-8M";
+		rockchip,camera-module-lens-name = "default";
+
+		port {
+			imx219_out0: endpoint {
+				remote-endpoint = <&mipidphy0_in_ucam1>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+};
+
+&csi2_dphy0_hw {
+	status = "okay";
+};
+
+&csi2_dphy0 {
+	status = "okay";
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		port@0 {
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			mipidphy0_in_ucam1: endpoint@2 {
+				reg = <2>;
+				remote-endpoint = <&imx219_out0>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+
+	port@1 {
+		reg = <1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		csidphy0_out: endpoint@0 {
+			reg = <0>;
+			remote-endpoint = <&mipi2_csi2_input>;
+		};
+	};
+};
+
+&mipi2_csi2 {
+	status = "okay";
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		port@0 {
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			mipi2_csi2_input: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&csidphy0_out>;
+			};
+		};
+		port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			mipi2_csi2_output: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&cif_mipi2_in0>;
+			};
+		};
+	};
+};
+
+&rkcif {
+	status = "okay";
+};
+
+&rkcif_mipi_lvds2 {
+	status = "okay";
+	port {
+		cif_mipi2_in0: endpoint {
+		remote-endpoint = <&mipi2_csi2_output>;
+		};
+	};
+};
+
+&rkcif_mipi_lvds2_sditf {
+	status = "okay";
+	port {
+		mipi_lvds2_sditf: endpoint {
+			remote-endpoint = <&isp0_vir0>;
+		};
+	};
+};
+
+&rkcif_mmu {
+	status = "okay";
+};
+
+&isp0_mmu {
+	status = "okay";
+};
+
+&rkisp0 {
+	status = "okay";
+};
+
+&rkisp0_vir0 {
+	status = "okay";
+	port {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		isp0_vir0: endpoint@0 {
+			reg = <0>;
+			remote-endpoint = <&mipi_lvds2_sditf>;
+		};
+	};
+};
+
+&pinctrl {
+	camera {
+		cam_pwdn_gpio: cam-pwdn-gpio {
+			rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};

arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3-host.dts

@@ -4,7 +4,7 @@
 / {
 	metadata {
 		title = "Set OTG port 0 to Host mode";
-		compatible = "rockchip,rk3588";
+		compatible = "radxa,rock-5a", "radxa,rock-5b", "radxa,rock-5c", "radxa,nx5-io";
 		category = "misc";
 		exclusive = "usbdrd_dwc3-dr_mode";
 		description = "Set OTG port 0 to Host mode.\nUse this when you want to connect USB devices.";

arch/arm64/boot/dts/rockchip/overlays/rk3588-dwc3-peripheral.dts

@@ -4,7 +4,7 @@
 / {
 	metadata {
 		title = "Set OTG port 0 to Peripheral mode";
-		compatible = "rockchip,rk3588";
+		compatible = "radxa,rock-5a", "radxa,rock-5b", "radxa,rock-5c", "radxa,nx5-io";
 		category = "misc";
 		exclusive = "usbdrd_dwc3-dr_mode";
 		description = "Set OTG port 0 to Peripheral mode.\nUse this when you want to connect to another computer.";