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Merge pull request #337 from Ken-Vamrs/main
add radxa camera 8m 219 for rock 5a/b
2 parents 851cb83 + cd6a058 commit 73a5f8d

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arch/arm64/boot/dts/rockchip/overlays/Makefile

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@@ -502,12 +502,14 @@ dtb-$(CONFIG_CPU_RK3588) += \
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rock-5-itx-rpi-camera-v2-on-cam1.dtbo \
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rock-5a-okdo-5mp-camera.dtbo \
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rock-5a-radxa-camera-4k.dtbo \
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rock-5a-radxa-camera-8m-219.dtbo \
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rock-5a-radxa-display-10fhd.dtbo \
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rock-5a-raspi-7inch-touchscreen.dtbo \
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rock-5a-rpi-camera-v1_3.dtbo \
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rock-5b-allnet-5inch-display.dtbo \
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rock-5b-okdo-5mp-camera.dtbo \
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rock-5b-radxa-camera-4k.dtbo \
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rock-5b-radxa-camera-8m-219.dtbo \
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rock-5b-radxa-display-10fhd.dtbo \
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rock-5b-raspi-7inch-touchscreen.dtbo \
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rock-5b-rpi-camera-v1_3.dtbo \
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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/ {
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metadata {
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title ="Enable Radxa Camera 8M 219";
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compatible = "radxa,rock-5a", "radxa,rock-5c";
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category = "camera";
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exclusive = "csi2_dphy0";
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description = "Enable Radxa Camera 8M 219.";
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};
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};
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&{/} {
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camera_pwdn_gpio: camera-pwdn-gpio {
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compatible = "regulator-fixed";
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regulator-name = "camera_pwdn_gpio";
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&cam_pwdn_gpio>;
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};
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clk_cam_24m: external-camera-clock-24m {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "clk_cam_24m";
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#clock-cells = <0>;
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};
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};
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&i2c3 {
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status = "okay";
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camera_imx219: camera-imx219@10 {
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compatible = "sony,imx219";
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reg = <0x10>;
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clocks = <&clk_cam_24m>;
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clock-names = "xvclk";
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "RADXA-CAMERA-8M";
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rockchip,camera-module-lens-name = "default";
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port {
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imx219_out0: endpoint {
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remote-endpoint = <&mipidphy0_in_ucam1>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&csi2_dphy0_hw {
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status = "okay";
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipidphy0_in_ucam1: endpoint@2 {
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reg = <2>;
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remote-endpoint = <&imx219_out0>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi2_csi2_input>;
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};
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};
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};
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};
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&mipi2_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi2_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidphy0_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi2_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi2_in0>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds2 {
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status = "okay";
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port {
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cif_mipi2_in0: endpoint {
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remote-endpoint = <&mipi2_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds2_sditf {
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status = "okay";
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port {
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mipi_lvds2_sditf: endpoint {
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remote-endpoint = <&isp0_vir0>;
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};
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};
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};
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&rkcif_mmu {
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status = "okay";
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};
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&isp0_mmu {
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status = "okay";
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};
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&rkisp0 {
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status = "okay";
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};
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&rkisp0_vir0 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp0_vir0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_lvds2_sditf>;
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};
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};
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};
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&pinctrl {
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camera {
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cam_pwdn_gpio: cam-pwdn-gpio {
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rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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/ {
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metadata {
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title ="Enable Radxa Camera 8M 219";
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compatible = "radxa,rock-5b";
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category = "camera";
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exclusive = "csi2_dphy0";
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description = "Enable Radxa Camera 8M 219.";
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};
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};
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&{/} {
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camera_pwdn_gpio: camera-pwdn-gpio {
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compatible = "regulator-fixed";
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regulator-name = "camera_pwdn_gpio";
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&cam_pwdn_gpio>;
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};
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clk_cam_24m: external-camera-clock-24m {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "clk_cam_24m";
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#clock-cells = <0>;
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};
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};
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&i2c3 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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camera_imx219: camera-imx219@10 {
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compatible = "sony,imx219";
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reg = <0x10>;
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clocks = <&clk_cam_24m>;
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clock-names = "xvclk";
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "RADXA-CAMERA-8M";
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rockchip,camera-module-lens-name = "default";
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port {
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imx219_out0: endpoint {
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remote-endpoint = <&mipidphy0_in_ucam1>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&csi2_dphy0_hw {
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status = "okay";
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipidphy0_in_ucam1: endpoint@2 {
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reg = <2>;
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remote-endpoint = <&imx219_out0>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi2_csi2_input>;
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};
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};
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};
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};
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&mipi2_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi2_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidphy0_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi2_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi2_in0>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds2 {
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status = "okay";
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port {
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cif_mipi2_in0: endpoint {
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remote-endpoint = <&mipi2_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds2_sditf {
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status = "okay";
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port {
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mipi_lvds2_sditf: endpoint {
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remote-endpoint = <&isp0_vir0>;
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};
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};
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};
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&rkcif_mmu {
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status = "okay";
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};
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&isp0_mmu {
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status = "okay";
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};
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&rkisp0 {
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status = "okay";
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};
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&rkisp0_vir0 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp0_vir0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_lvds2_sditf>;
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};
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};
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};
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&pinctrl {
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camera {
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cam_pwdn_gpio: cam-pwdn-gpio {
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rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};

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