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VanNamDinhVanNamDinh
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Merge pull request #5 from NoMaY-jp/RXTB-RTOSDemo
Update Renesas RX100 and RX600v2 port layer for Renesas TB-RX130/RX231/RX65N RTOS Demo
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‎portable/GCC/RX/port.c‎

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‎portable/GCC/RX/portmacro.h‎

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/*
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* FreeRTOS Kernel V10.4.1
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* *INDENT-ON* */
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/*-----------------------------------------------------------
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* Port specific definitions.
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*
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* The settings in this file configure FreeRTOS correctly for the
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* given hardware and compiler.
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*
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* These settings should not be altered.
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*-----------------------------------------------------------
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*/
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/* If configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H is set to 0 then iodefine.h
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* is included and used in FreeRTOS Kernel's Renesas RX port. If the macro is set
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* to 1 then platform.h is included and used in the port. If the macro is set to 2
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* then neither iodefine.h nor platform.h are included. If the macro is undefined,
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* it is set to 0 (CC-RX/GNURX) or 2 (ICCRX) internally for backward compatibility.
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* When the FIT configurator or the Smart Configurator is used, platform.h has to be
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* used. */
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#ifndef configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H
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#define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 0
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#endif
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/* If configUSE_TASK_DPFPU_SUPPORT is set to 1 (or undefined) then each task will
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* be created without a DPFPU context, and a task must call vTaskUsesDPFPU() before
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* making use of any DPFPU registers. If configUSE_TASK_DPFPU_SUPPORT is set to 2 then
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* tasks are created with a DPFPU context by default, and calling vTaskUsesDPFPU() has
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* no effect. If configUSE_TASK_DPFPU_SUPPORT is set to 0 then tasks never take care
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* of any DPFPU context (even if DPFPU registers are used). */
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#ifdef __RX_DFPU_INSNS__
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/* The compiler may use DPFPU registers. */
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#ifndef configUSE_TASK_DPFPU_SUPPORT
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#define configUSE_TASK_DPFPU_SUPPORT 1
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#endif
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#else
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/* The compiler does not use DPFPU registers. */
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#ifdef configUSE_TASK_DPFPU_SUPPORT
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#undef configUSE_TASK_DPFPU_SUPPORT
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#endif
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#define configUSE_TASK_DPFPU_SUPPORT 0
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#endif
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#define portUSE_TASK_DPFPU_SUPPORT configUSE_TASK_DPFPU_SUPPORT
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#ifdef __RX_FPU_INSNS__
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/* The compiler may use FPSW register. */
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#define portUSE_TASK_FPU_SUPPORT 1
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#else
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/* The compiler does not use FPSW register. */
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#define portUSE_TASK_FPU_SUPPORT 0
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#endif
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#ifdef __RXv1__
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/* The CPU has only one accumulator. */
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#define portUSE_TASK_ACC_SUPPORT 1
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#elif !defined( __RXv2__ ) && !defined( __RXv3__ ) && ( __GNUC__ < 8 )
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/* The CPU is RXv1 and has only one accumulator. */
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#define portUSE_TASK_ACC_SUPPORT 1
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#else
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/* The CPU has two accumulators. */
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#define portUSE_TASK_ACC_SUPPORT 2
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#endif
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/*-----------------------------------------------------------*/
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/* Type definitions - these are a bit legacy and not really used now, other than
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* portSTACK_TYPE and portBASE_TYPE. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
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typedef portSTACK_TYPE StackType_t;
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typedef long BaseType_t;
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typedef unsigned long UBaseType_t;
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#if ( configUSE_16_BIT_TICKS == 1 )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#else
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
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* not need to be guarded with a critical section. */
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#define portTICK_TYPE_IS_ATOMIC 1
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#endif
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/*-----------------------------------------------------------*/
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/* Inline assembler specifics. */
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#if ( defined( __STDC_VERSION__ ) && ( __STDC_VERSION__ >= 199901L ) )
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/* *INDENT-OFF* */
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#define _portASM( ... ) __asm volatile ( #__VA_ARGS__ "\n" );
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#define portASM( ... ) _portASM( __VA_ARGS__ )
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#define portASM_LAB_NEXT( name ) ?+
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#define portASM_LAB_PREV( name ) ?-
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#define portASM_LAB( name_colon ) _portASM( ?: )
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#define portASM_BEGIN
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#define portASM_END
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/* *INDENT-ON* */
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#endif /* if ( defined( __STDC_VERSION__ ) && ( __STDC_VERSION__ >= 199901L ) ) */
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/* Workaround to reduce errors/warnings caused by e2 studio CDT's INDEXER and CODAN. */
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#ifdef __CDT_PARSER__
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#ifndef __asm
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#define __asm asm
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#endif
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#ifndef __attribute__
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#define __attribute__( ... )
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#endif
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#endif
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/*-----------------------------------------------------------*/
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/* Hardware specifics. */
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#define portBYTE_ALIGNMENT 8 /* Could make four, according to manual. */
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#define portSTACK_GROWTH -1
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portNOP() __asm volatile ( "NOP" )
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/* Yield equivalent to "*portITU_SWINTR = 0x01; ( void ) ( *portITU_SWINTR == XXX );"
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* where portITU_SWINTR is the location of the software interrupt register
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* (0x000872E0) and XXX is an arbitrary number. Don't rely on the assembler to
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* select a register, so instead save and restore clobbered registers manually. */
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/* *INDENT-OFF* */
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#define portYIELD() \
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__asm volatile \
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( \
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"PUSH.L R10 \n"\
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"MOV.L #0x872E0, R10 \n"\
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"MOV.B #0x1, [ R10 ] \n"\
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"CMP [ R10 ].UB, R10 \n"\
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"POP R10 "\
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:::"cc" \
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)
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/* *INDENT-ON* */
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#define portYIELD_FROM_ISR( x ) if( ( x ) != pdFALSE ) portYIELD()
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/* These macros should not be called directly, but through the
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* taskENTER_CRITICAL() and taskEXIT_CRITICAL() macros. An extra check is
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* performed if configASSERT() is defined to ensure an assertion handler does not
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* inadvertently attempt to lower the IPL when the call to assert was triggered
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* because the IPL value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY
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* when an ISR safe FreeRTOS API function was executed. ISR safe FreeRTOS API
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* functions are those that end in FromISR. FreeRTOS maintains a separate
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* interrupt API to ensure API function and interrupt entry is as fast and as
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* simple as possible. */
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#define portENABLE_INTERRUPTS() __asm volatile ( "MVTIPL #0" )
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#ifdef configASSERT
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#define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() configASSERT( ( ulPortGetIPL() <= configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
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#define portDISABLE_INTERRUPTS() if( ulPortGetIPL() < configMAX_SYSCALL_INTERRUPT_PRIORITY ) __asm volatile ( "MVTIPL %0" ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
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#else
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#define portDISABLE_INTERRUPTS() __asm volatile ( "MVTIPL %0" ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
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#endif
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/* Critical nesting counts are stored in the TCB. */
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#define portCRITICAL_NESTING_IN_TCB ( 1 )
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/* The critical nesting functions defined within tasks.c. */
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extern void vTaskEnterCritical( void );
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extern void vTaskExitCritical( void );
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#define portENTER_CRITICAL() vTaskEnterCritical()
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#define portEXIT_CRITICAL() vTaskExitCritical()
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/* As this port allows interrupt nesting... */
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uint32_t ulPortGetIPL( void ) __attribute__( ( naked ) );
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void vPortSetIPL( uint32_t ulNewIPL ) __attribute__( ( naked ) );
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortGetIPL(); portDISABLE_INTERRUPTS()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) vPortSetIPL( uxSavedInterruptStatus )
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/*-----------------------------------------------------------*/
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/* Task function macros as described on the FreeRTOS.org WEB site. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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/*-----------------------------------------------------------*/
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/* If portUSE_TASK_DPFPU_SUPPORT is set to 1 (or left undefined) then tasks are
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* created without a DPFPU context and must call vPortTaskUsesDPFPU() to give
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* themselves a DPFPU context before using any DPFPU instructions. If
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* portUSE_TASK_DPFPU_SUPPORT is set to 2 then all tasks will have a DPFPU context
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* by default. */
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#if ( portUSE_TASK_DPFPU_SUPPORT == 1 )
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void vPortTaskUsesDPFPU( void );
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#else
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/* Each task has a DPFPU context already, so define this function away to
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* nothing to prevent it being called accidentally. */
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#define vPortTaskUsesDPFPU()
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#endif
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#define portTASK_USES_DPFPU() vPortTaskUsesDPFPU()
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/* Definition to allow compatibility with existing FreeRTOS Demo using flop.c. */
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#define portTASK_USES_FLOATING_POINT() vPortTaskUsesDPFPU()
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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}
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#endif
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/* *INDENT-ON* */
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#endif /* PORTMACRO_H */

‎portable/GCC/RX/readme.txt‎

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The generic RX port layer in this folder can be used for the following MCUs in case of other than using
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tickless idle functionality of RX100 port layers and/or using C89 specification and/or using old version
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of ICCRX.
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RX MCU Group CPU FPU FPU
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Core (Single (Double
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Type Precision) Precision)
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RX110 RXv1 No ---
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RX111 RXv1 No ---
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RX113 RXv1 No ---
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RX130 RXv1 No ---
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RX13T RXv1 Yes ---
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RX210 RXv1 No ---
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RX21A RXv1 No ---
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RX220 RXv1 No ---
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RX230,RX231 RXv2 Yes ---
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RX23E-A RXv2 Yes ---
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RX23W RXv2 Yes ---
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RX23T RXv2 Yes ---
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RX24T RXv2 Yes ---
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RX24U RXv2 Yes ---
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RX610 RXv1 Yes ---
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RX62N,RX621 RXv1 Yes ---
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RX630 RXv1 Yes ---
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RX634 RXv1 Yes ---
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RX63N,RX631 RXv1 Yes ---
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RX64M RXv2 Yes ---
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RX65N,RX651 RXv2 Yes ---
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RX66N RXv3 Yes Yes
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RX62T RXv1 Yes ---
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RX62G RXv1 Yes ---
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RX63T RXv1 Yes ---
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RX66T RXv3 Yes No
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RX71M RXv2 Yes ---
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RX72M RXv3 Yes Yes
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RX72N RXv3 Yes Yes
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RX72T RXv3 Yes No
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Notes:
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(1) When you use the FIT configurator or the Smart Configurator, platform.h has to be used. In this case,
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the following definition is necessary in FreeRTOSConfig.h.
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/* If configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H is set to 0 then iodefine.h
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is included and used in FreeRTOS Kernel's Renesas RX port. If the macro is set
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to 1 then platform.h is included and used in the port. If the macro is set to 2
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then neither iodefine.h nor platform.h are included. If the macro is undefined,
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it is set to 0 (CC-RX/GNURX) or 2 (ICCRX) internally for backward compatibility.
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When the FIT configurator or the Smart Configurator is used, platform.h has to be
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used. */
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#define configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H 1
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(2) When you use the CC-RX compiler of Renesas or the GNURX compiler, the definition of configTICK_VECTOR
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is like the following:
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/* The peripheral used to generate the tick interrupt is configured as part of
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the application code. This constant should be set to the vector number of the
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peripheral chosen. As supplied this is CMT0. */
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#define configTICK_VECTOR _CMT0_CMI0
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(3) When you use the ICCRX compiler of IAR, the definition of configTICK_VECTOR depends on the setting of
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configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H like the followings:
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(3-1) In case of configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 0 or 1
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#define configTICK_VECTOR _CMT0_CMI0
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(3-2) In case of configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 2 or undefined
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#define configTICK_VECTOR VECT_CMT0_CMI0
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(4) Moreover in the case of above (3-2), I/O register definition header file which is provided from IAR
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has to be included in FreeRTOSConfig.h like the followings:
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/* Renesas hardware definition header. */
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#include <iorx71m.h>
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For more information about Renesas RX MCUs, please visit the following URL:
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https://www.renesas.com/products/microcontrollers-microprocessors/rx.html
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‎portable/GCC/RX100/readme.txt‎

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The following table shows which port is recommended to be used.
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The following port layers are no longer recommended to be used other than using tickless idle functionality
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of RX100 port layers and/or using C89 specification and/or using old version of ICCRX. The following table
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shows which port layer can be used if you have to use one of the following port layers.
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RX MCU Group CPU FPU FPU Port Layer
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RX63N,RX631 RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
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RX64M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
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RX65N,RX651 RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
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RX66N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU
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RX66N RXv3 Yes Yes N/A (*5) N/A (*5) N/A (*5)
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RX62T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
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RX62G RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
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RX63T RXv1 Yes --- Renesas/RX600 GCC/RX600 IAR/RX600
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RX66T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5)
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RX66T RXv3 Yes No Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
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RX71M RXv2 Yes --- Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
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RX72M RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU
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RX72N RXv3 Yes Yes Renesas/RX700v3_DPFPU GCC/RX700v3_DPFPU IAR/RX700v3_DPFPU
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RX72T RXv3 Yes No Renesas/RX600v2 (*5) GCC/RX600v2 (*5) IAR/RXv2 (*5)
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RX72M RXv3 Yes Yes N/A (*5) N/A (*5) N/A (*5)
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RX72N RXv3 Yes Yes N/A (*5) N/A (*5) N/A (*5)
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RX72T RXv3 Yes No Renesas/RX600v2 GCC/RX600v2 IAR/RXv2
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Notes:
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@@ -55,9 +57,7 @@ configTICK_VECTOR (in FreeRTOSConfig.h).
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*4: RX600 ports use MVTIPL instruction but RX610 MCUs don't support this instruction.
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*5: RX700v3_DPFPU ports are also available with the following definition in FreeRTOSConfig.h.
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#define configUSE_TASK_DPFPU_SUPPORT 0
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*5: Please use generic RX port layers (i.e. Renesas/RX, GCC/RX, IAR/RX).
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*6: PriorityDefinitions.h has to be provided for port_asm.s in case of other than RX700v3_DPFPU port.
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It contains two definitions of interrupt priority like the following.

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