Our data abort exception test relies on an unaligned load triggering a data abort. This does not happen on ARM7TDMI.
A more reliable way to trigger a data abort on that processor is to read a value from an address that is reserved. e.g.
core::arch::naked_asm!(
"ldr r0, =0xC0000000",
"ldr r0, [r0]",
"bx lr",
);
The address 0xC000_0000 is not a valid address on the LPC2138 microcontroller I tested with because it's in the reserved range.
Our data abort exception test relies on an unaligned load triggering a data abort. This does not happen on ARM7TDMI.
A more reliable way to trigger a data abort on that processor is to read a value from an address that is reserved. e.g.
The address
0xC000_0000is not a valid address on the LPC2138 microcontroller I tested with because it's in the reserved range.