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sse4.2: added the implementation for mm_cmpestra
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‎simde/x86/sse4.2.h‎

Lines changed: 221 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,227 @@ SIMDE_BEGIN_DECLS_
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#define _SIDD_UNIT_MASK SIMDE_SIDD_UNIT_MASK
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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int
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simde_mm_cmpestra_8_(simde__m128i a, int la, simde__m128i b, int lb, const int imm8)
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SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
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const int cmp_op = imm8 & 0x0c;
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const int polarity = imm8 & 0x30;
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simde__m128i_private
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bool_res_ = simde__m128i_to_private(simde_mm_setzero_si128()),
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a_ = simde__m128i_to_private(a),
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b_ = simde__m128i_to_private(b);
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const int upper_bound = (128 / 8) - 1;
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int a_invalid = 0;
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int b_invalid = 0;
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for(int i = 0 ; i < upper_bound ; i++) {
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for(int j = 0; j< upper_bound ; j++){
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int bitvalue = ((a_.i8[i] == b_.i8[j]) ? 1 : 0);
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if(i == la)
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a_invalid = 1;
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if(j == lb)
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b_invalid = 1;
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switch(cmp_op){
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case SIMDE_SIDD_CMP_EQUAL_ANY:
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case SIMDE_SIDD_CMP_RANGES:
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bitvalue = 0;
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break;
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case SIMDE_SIDD_CMP_EQUAL_EACH:
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if(a_invalid && b_invalid)
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bitvalue = 1;
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else
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bitvalue = 0;
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break;
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case SIMDE_SIDD_CMP_EQUAL_ORDERED:
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if(a_invalid && !b_invalid)
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bitvalue = 1;
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else if(a_invalid && b_invalid)
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bitvalue = 1;
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else
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bitvalue = 0;
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break;
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}
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bool_res_.i8[i] |= (bitvalue << j);
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}
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}
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int32_t int_res_1 = 0;
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int32_t int_res_2 = 0;
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switch(cmp_op) {
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case SIMDE_SIDD_CMP_EQUAL_ANY:
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for(int i = 0 ; i < upper_bound ; i++){
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SIMDE_VECTORIZE_REDUCTION(|:int_res_1)
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for(int j = 0 ; j < upper_bound ; j++){
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int_res_1 |= (((bool_res_.i8[i] >> j) & 1) << i);
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}
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}
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break;
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case SIMDE_SIDD_CMP_RANGES:
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for(int i = 0 ; i < upper_bound ; i++){
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SIMDE_VECTORIZE_REDUCTION(|:int_res_1)
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for(int j = 0 ; j < upper_bound ; j++){
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int_res_1 |= ((((bool_res_.i8[i] >> j) & 1) & ((bool_res_.i8[i] >> (j + 1)) & 1)) << i);
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j += 2;
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}
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}
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break;
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case SIMDE_SIDD_CMP_EQUAL_EACH:
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for(int i = 0 ; i < upper_bound ; i++){
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SIMDE_VECTORIZE_REDUCTION(|:int_res_1)
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for(int j = 0 ; j < upper_bound ; j++){
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int_res_1 |= (((bool_res_.i8[i] >> i) & 1) << i);
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}
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}
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break;
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case SIMDE_SIDD_CMP_EQUAL_ORDERED:
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int_res_1 = 0xff;
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for(int i = 0 ; i < upper_bound ; i++){
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int k = i;
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SIMDE_VECTORIZE_REDUCTION(&:int_res_1)
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for(int j = 0 ; j < (upper_bound-i) ; j++){
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int_res_1 &= (((bool_res_.i8[k] >> j) & 1 ) << i) ;
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k += 1;
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}
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}
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break;
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}
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for(int i = 0; i < upper_bound ; i++){
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if(polarity & 1){
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if((polarity >> 1) & 1) {
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if (i >= lb) {
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int_res_2 |= (((int_res_1 >> i) & 1) << i);
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}
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else {
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int_res_2 |= ((((int_res_1 >> i) & 1) ^ (-1)) << i);
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}
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}
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else{
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int_res_2 |= ((((int_res_1 >> i) & 1) ^ (-1)) << i);
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}
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}
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else{
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int_res_2 |= ( ((int_res_1 >> i) & 1) << i);
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}
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}
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return !int_res_2 & (lb > upper_bound);
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}
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SIMDE_FUNCTION_ATTRIBUTES
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int
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simde_mm_cmpestra_16_(simde__m128i a, int la, simde__m128i b, int lb, const int imm8)
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SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
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const int cmp_op = imm8 & 0x0c;
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const int polarity = imm8 & 0x30;
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simde__m128i_private
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bool_res_ = simde__m128i_to_private(simde_mm_setzero_si128()),
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a_ = simde__m128i_to_private(a),
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b_ = simde__m128i_to_private(b);
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const int upper_bound = (128 / 16) - 1;
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int a_invalid = 0;
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int b_invalid = 0;
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for(int i = 0 ; i < upper_bound ; i++) {
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for(int j = 0; j< upper_bound ; j++)
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{
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int bitvalue = ((a_.i16[i] == b_.i16[j]) ? 1 : 0);
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if(i == la)
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a_invalid = 1;
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if(j == lb)
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b_invalid = 1;
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switch(cmp_op){
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case SIMDE_SIDD_CMP_EQUAL_ANY:
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case SIMDE_SIDD_CMP_RANGES:
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bitvalue = 0;
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break;
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case SIMDE_SIDD_CMP_EQUAL_EACH:
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if(a_invalid && b_invalid)
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bitvalue = 1;
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else
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bitvalue = 0;
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break;
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case SIMDE_SIDD_CMP_EQUAL_ORDERED:
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if(a_invalid && !b_invalid)
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bitvalue = 1;
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else if(a_invalid && b_invalid)
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bitvalue = 1;
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else
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bitvalue = 0;
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break;
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}
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bool_res_.i16[i] |= (bitvalue << j);
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}
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}
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int32_t int_res_1 = 0;
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int32_t int_res_2 = 0;
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switch(cmp_op) {
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case SIMDE_SIDD_CMP_EQUAL_ANY:
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for(int i = 0 ; i < upper_bound ; i++){
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SIMDE_VECTORIZE_REDUCTION(|:int_res_1)
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for (int j = 0 ; j < upper_bound ; j++){
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int_res_1 |= (((bool_res_.i16[i] >> j) & 1) << i) ;
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}
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}
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break;
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case SIMDE_SIDD_CMP_RANGES:
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for(int i = 0 ; i < upper_bound ; i++){
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SIMDE_VECTORIZE_REDUCTION(|:int_res_1)
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for(int j = 0 ; j < upper_bound ; j++){
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int_res_1 |= ((((bool_res_.i16[i] >> j) & 1) & ((bool_res_.i16[i] >> (j + 1)) & 1)) << i);
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j += 2;
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}
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}
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break;
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case SIMDE_SIDD_CMP_EQUAL_EACH:
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for(int i = 0 ; i < upper_bound ; i++){
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SIMDE_VECTORIZE_REDUCTION(|:int_res_1)
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for(int j = 0 ; j < upper_bound ; j++){
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int_res_1 |= (((bool_res_.i16[i] >> i) & 1) << i);
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}
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}
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break;
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case SIMDE_SIDD_CMP_EQUAL_ORDERED:
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int_res_1 = 0xffff;
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for(int i = 0 ; i < upper_bound ; i++){
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int k = i;
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SIMDE_VECTORIZE_REDUCTION(&:int_res_1)
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for(int j = 0 ; j < (upper_bound-i) ; j++){
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int_res_1 &= (((bool_res_.i16[k] >> j) & 1) << i) ;
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k += 1;
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}
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}
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break;
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}
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for(int i = 0; i < upper_bound ; i++){
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if(polarity & 1){
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if((polarity >> 1) & 1) {
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if (i >= lb) {
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int_res_2 |= (((int_res_1 >> i) & 1) << i);
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}
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else {
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int_res_2 |= ((((int_res_1 >> i) & 1) ^ (-1)) << i);
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}
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}
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else{
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int_res_2 |= ((((int_res_1 >> i) & 1) ^ (-1)) << i);
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}
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}
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else{
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int_res_2 |= (((int_res_1 >> i) & 1) << i);
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}
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}
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return !int_res_2 & (lb > upper_bound);
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}
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#if defined(SIMDE_X86_SSE4_2_NATIVE)
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#define simde_mm_cmpestra(a, la, b, lb, imm8) _mm_cmpestra(a, la, b, lb, imm8)
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#else
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#define simde_mm_cmpestra(a, la, b, lb, imm8) \
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(((imm8) & SIMDE_SIDD_UWORD_OPS) \
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? simde_mm_cmpestra_16_((a), (la), (b), (lb), (imm8)) \
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: simde_mm_cmpestra_8_((a), (la), (b), (lb), (imm8)))
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#endif
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#if defined(SIMDE_X86_SSE4_2_ENABLE_NATIVE_ALIASES)
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#define _mm_cmpestra(a, la, b, lb, imm8) simde_mm_cmpestra(a, la, b, lb, imm8)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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int simde_mm_cmpestrs (simde__m128i a, int la, simde__m128i b, int lb, const int imm8)
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SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 127) {

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