Skip to content

Commit 616907c

Browse files
committed
implement WasmTy for V128 (#1437)
* implement WasmTy for V128 This allows using V128 values in the TypedFunc API. * only implement WasmTy for V128 if `simd` is enabled * move simd specific methods to simd submodule This silences some dead_code warnings in non-simd compilation * use append_instr convenience method in more places This avoids yet another dead_code warning in non-simd compilation. * fix broken intra doc link
1 parent d592fa2 commit 616907c

File tree

5 files changed

+44
-32
lines changed

5 files changed

+44
-32
lines changed

crates/wasmi/src/engine/executor/instrs.rs

Lines changed: 0 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -2667,23 +2667,6 @@ impl Executor<'_> {
26672667
},
26682668
}
26692669
}
2670-
2671-
/// Fetches the [`Reg`] and [`Offset64Hi`] parameters for a load or store [`Instruction`].
2672-
unsafe fn fetch_reg_and_lane<LaneType>(&self, delta: usize) -> (Reg, LaneType)
2673-
where
2674-
LaneType: TryFrom<u8>,
2675-
{
2676-
let mut addr: InstructionPtr = self.ip;
2677-
addr.add(delta);
2678-
match addr.get().filter_register_and_lane::<LaneType>() {
2679-
Ok(value) => value,
2680-
Err(instr) => unsafe {
2681-
unreachable_unchecked!(
2682-
"expected an `Instruction::RegisterAndImm32` but found: {instr:?}"
2683-
)
2684-
},
2685-
}
2686-
}
26872670
}
26882671

26892672
impl Executor<'_> {

crates/wasmi/src/engine/executor/instrs/simd.rs

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,9 @@ use crate::{
2323
Error,
2424
};
2525

26+
#[cfg(doc)]
27+
use crate::ir::Offset64Hi;
28+
2629
impl Executor<'_> {
2730
/// Fetches a [`Reg`] from an [`Instruction::Register`] instruction parameter.
2831
fn fetch_register(&self) -> Reg {
@@ -41,6 +44,32 @@ impl Executor<'_> {
4144
}
4245
}
4346

47+
/// Fetches the [`Reg`] and [`Offset64Hi`] parameters for a load or store [`Instruction`].
48+
unsafe fn fetch_reg_and_lane<LaneType>(&self, delta: usize) -> (Reg, LaneType)
49+
where
50+
LaneType: TryFrom<u8>,
51+
{
52+
let mut addr: InstructionPtr = self.ip;
53+
addr.add(delta);
54+
match addr.get().filter_register_and_lane::<LaneType>() {
55+
Ok(value) => value,
56+
Err(instr) => unsafe {
57+
unreachable_unchecked!(
58+
"expected an `Instruction::RegisterAndImm32` but found: {instr:?}"
59+
)
60+
},
61+
}
62+
}
63+
64+
/// Returns the register `value` and `lane` parameters for a `load` [`Instruction`].
65+
pub fn fetch_value_and_lane<LaneType>(&self, delta: usize) -> (Reg, LaneType)
66+
where
67+
LaneType: TryFrom<u8>,
68+
{
69+
// Safety: Wasmi translation guarantees that `Instruction::RegisterAndImm32` exists.
70+
unsafe { self.fetch_reg_and_lane::<LaneType>(delta) }
71+
}
72+
4473
/// Fetches a [`Reg`] from an [`Instruction::Const32`] instruction parameter.
4574
fn fetch_const32_as<T>(&self) -> T
4675
where

crates/wasmi/src/engine/executor/instrs/utils.rs

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -36,15 +36,6 @@ impl Executor<'_> {
3636
unsafe { self.fetch_reg_and_offset_hi() }
3737
}
3838

39-
/// Returns the register `value` and `lane` parameters for a `load` [`Instruction`].
40-
pub fn fetch_value_and_lane<LaneType>(&self, delta: usize) -> (Reg, LaneType)
41-
where
42-
LaneType: TryFrom<u8>,
43-
{
44-
// Safety: Wasmi translation guarantees that `Instruction::RegisterAndImm32` exists.
45-
unsafe { self.fetch_reg_and_lane::<LaneType>(delta) }
46-
}
47-
4839
/// Fetches the bytes of the default memory at index 0.
4940
pub fn fetch_default_memory_bytes(&self) -> &[u8] {
5041
// Safety: the `self.cache.memory` pointer is always synchronized

crates/wasmi/src/engine/translator/mod.rs

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2242,7 +2242,7 @@ impl FuncTranslator {
22422242
},
22432243
};
22442244
self.push_fueled_instr(instr, FuelCosts::store)?;
2245-
self.alloc.instr_encoder.append_instr(param)?;
2245+
self.append_instr(param)?;
22462246
if !memory.is_default() {
22472247
self.alloc
22482248
.instr_encoder
@@ -2540,7 +2540,7 @@ impl FuncTranslator {
25402540
}
25412541
};
25422542
self.push_fueled_instr(instr, FuelCosts::base)?;
2543-
self.alloc.instr_encoder.append_instr(param)?;
2543+
self.append_instr(param)?;
25442544
Ok(())
25452545
}
25462546

@@ -2584,7 +2584,7 @@ impl FuncTranslator {
25842584
),
25852585
};
25862586
self.push_fueled_instr(instr, FuelCosts::base)?;
2587-
self.alloc.instr_encoder.append_instr(param)?;
2587+
self.append_instr(param)?;
25882588
Ok(())
25892589
}
25902590

@@ -2628,7 +2628,7 @@ impl FuncTranslator {
26282628
),
26292629
};
26302630
self.push_fueled_instr(instr, FuelCosts::base)?;
2631-
self.alloc.instr_encoder.append_instr(param)?;
2631+
self.append_instr(param)?;
26322632
Ok(())
26332633
}
26342634

@@ -2924,7 +2924,7 @@ impl FuncTranslator {
29242924
}
29252925
},
29262926
};
2927-
self.alloc.instr_encoder.append_instr(param_instr)?;
2927+
self.append_instr(param_instr)?;
29282928
self.translate_br_table_targets_simple(&[value])?;
29292929
self.reachable = false;
29302930
Ok(())

crates/wasmi/src/func/into_func.rs

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,9 @@ use crate::{
1212
};
1313
use core::{array, iter::FusedIterator};
1414

15+
#[cfg(feature = "simd")]
16+
use crate::core::V128;
17+
1518
/// Closures and functions that can be used as host functions.
1619
pub trait IntoFunc<T, Params, Results>: Send + Sync + 'static {
1720
/// The parameters of the host function.
@@ -162,8 +165,12 @@ pub trait WasmTy: From<UntypedVal> + Into<UntypedVal> + Send {
162165
}
163166

164167
macro_rules! impl_wasm_type {
165-
( $( type $rust_type:ty = $wasmi_type:ident );* $(;)? ) => {
168+
( $(
169+
$( #[$attr:meta] )*
170+
type $rust_type:ty = $wasmi_type:ident );* $(;)?
171+
) => {
166172
$(
173+
$( #[$attr] )*
167174
impl WasmTy for $rust_type {
168175
#[inline]
169176
fn ty() -> ValType {
@@ -182,6 +189,8 @@ impl_wasm_type! {
182189
type F64 = F64;
183190
type f32 = F32;
184191
type f64 = F64;
192+
#[cfg(feature = "simd")]
193+
type V128 = V128;
185194
type FuncRef = FuncRef;
186195
type ExternRef = ExternRef;
187196
}

0 commit comments

Comments
 (0)