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@qzhhhi qzhhhi commented Feb 16, 2026

PR 摘要:c_board 固件模块集成

概述

本PR向librmcs项目添加了完整的c_board固件支持,包括STM32F407微控制器的HAL驱动程序库、CMSIS核心库和基于CMake的构建系统。这是一个大规模的基础设施提交,为嵌入式固件开发奠定了基础。

核心变更

构建系统与工作流

  • lint.yml: 在linting工作流中新增"Configure firmware/c_board"步骤,用于CMake预设配置

  • lint-targets.yml: 添加c_board的lint目标定义,指定firmware/c_board/CMakeLists.txt和相关源目录

  • CMakeLists.txt (固件根目录):

    • 强制C11/C++23标准
    • 支持Debug和Release编译模式
    • 集成HAL子目录和SEGGER RTT库
    • 支持HOST_DEBUGGER模式用于容器内调试
    • 实现源路径映射(-fdebug-prefix-map)用于容器到主机的调试路径转换
    • 收集src和core目录的源文件
    • 默认设置为Debug编译模式,支持编译命令导出
  • CMakePresets.json: 定义四个CMake预设

    • base: 隐藏的基础预设,Ninja生成器,gcc-arm-none-eabi工具链
    • debug: Debug编译,HOST_DEBUGGER=OFF
    • debug-outside: Debug编译,HOST_DEBUGGER=ON(用于容器外调试)
    • release: Release编译

代码质量工具配置

  • .clang-tidy: 继承父配置,添加bits和cmsis头文件的过滤规则
  • .clangd: 配置ARM编译工具链标志,ARM系统包含路径,以及已知LLVM问题的头文件忽略规则

STM32 HAL 驱动程序

添加完整的STM32F407 HAL支持:

外设初始化模块:

  • can.c/can.h: CAN1和CAN2外设初始化,配置参数、GPIO映射(CAN1: PD0/PD1, CAN2: PB5/PB6)、中断优先级
  • gpio.c/gpio.h: GPIO初始化,配置多个GPIO端口(A-H)、片选和中断引脚、EXTI中断配置
  • spi.c/spi.h: SPI1主控初始化,8位模式、高速、NSS软件控制、中断配置
  • usart.c/usart.h: 三个UART(USART1/3/6)初始化,分别配置不同的波特率和引脚
  • tim.c/tim.h: TIM5 PWM初始化,三个PWM通道用于LED RGB控制(PH12/PH11/PH10)

系统初始化:

  • main.c:

    • MCU初始化序列(HAL初始化、系统时钟配置、DWT延时使能)
    • USB PID从12字节唯一ID通过CRC-16循环生成
    • 所有外设初始化调用(GPIO、SPI、USB、CAN、UART、TIM)
    • 应用程序引导路径(AppEntry + assert(0))
    • SystemClock_Config:HSE PLL时钟配置
    • Error_Handler和assert_failed实现
  • stm32f4xx_it.c/stm32f4xx_it.h:

    • Cortex-M4异常处理程序(NMI、HardFault、MemManage、BusFault、UsageFault、SVC、DebugMon、PendSV、SysTick)
    • 外设中断处理程序(EXTI4/9_5、CAN1/2_RX0、SPI1、USART1/3/6、OTG_FS)
    • 故障处理程序进入无限循环;外设处理程序委托给HAL处理程序
  • system_stm32f4xx.c:

    • SystemInit:配置FPU、向量表、可选外部内存初始化
    • SystemCoreClockUpdate:基于当前时钟设置更新SystemCoreClock
    • SystemInit_ExtMemCtl:可选的外部SRAM/SDRAM初始化(多个STM32F4变体支持)

内存和系统支持:

  • syscalls.c: Newlib系统调用存根(_read、_write、_open等18个函数),支持I/O重定向到__io_putchar和__io_getchar
  • sysmem.c: _sbrk函数实现,支持malloc库内存堆增长,包含栈溢出检查
  • stm32f4xx_hal_msp.c: HAL MSP初始化,使能SYSCFG和PWR时钟

配置文件:

  • stm32f4xx_hal_conf.h: STM32 HAL配置(495行)

    • HAL模块启用/禁用(SPI、TIM、UART、GPIO、CAN等)
    • 时钟值定义(HSE、HSI、LSE等)
    • 缓冲和预取使能标志
    • 以太网配置(MAC地址、PHY参数)
    • 断言机制配置
  • .mxproject: STM32CubeMX项目配置,包含文件列表、源路径、预处理定义

CMSIS 核心库(Cortex Microcontroller Software Interface Standard)

编译器兼容层 (支持多个编译器):

  • cmsis_compiler.h: 编译器选择和条件包含(ArmCC、armclang、GCC、IAR、TI等)
  • cmsis_armcc.h (388行): ArmCC 5编译器特定的CMSIS支持,包含核心指令接口、寄存器访问函数、SIMD内联函数
  • cmsis_armclang.h (1503行): Arm Compiler 6 (armclang)支持,增强的内联汇编、TrustZone感知的访问器、广泛的SIMD/DSP内在函数
  • cmsis_armclang_ltm.h (1928行): armclang LTM (长期维护)版本,包含所有上述功能和额外的Load/Store互斥变体
  • cmsis_gcc.h (2211行): GCC编译器支持,GCC特定的内联函数和内在函数实现
  • cmsis_iccarm.h (1002行): IAR编译器支持,IAR特定的属性和内在函数映射

核心外设访问层:

  • core_cm0.h (952行): Cortex-M0核心寄存器、NVIC、SysTick定义和内联API
  • core_cm0plus.h (1087行): Cortex-M0+扩展,包括MPU支持
  • core_cm1.h (979行): Cortex-M1核心定义
  • core_sc000.h (1030行): SC000核心定义

系统设备定义:

  • stm32f4xx.h (301行): STM32F4系列设备头,条件包含设备特定头文件、原子操作宏、通用寄存器操作宏
  • system_stm32f4xx.h (104行): 系统时钟和核心时钟更新接口声明

特殊功能库:

  • cachel1_armv7.h (411行): L1缓存管理API(启用、禁用、无效化、清理操作)
  • mpu_armv7.h (275行): Armv7-M MPU配置API,区域大小、访问权限、RBAR/RASR构建宏
  • mpu_armv8.h (352行): Armv8-M MPU支持,包括非安全MPU变体、内存属性配置
  • pmu_armv8.h (337行): Armv8.1-M PMU (性能监视单元)事件定义和控制API
  • pac_armv81.h (206行): Armv8.1-M指针认证码(PAC)密钥访问接口
  • tz_context.h (70行): TrustZone上下文管理API
  • cmsis_version.h (39行): CMSIS版本号定义(5.6)

许可证:

  • 添加了LICENSE.txt文件用于CMSIS驱动程序和设备库(Apache 2.0许可证)

技术特性

  • ✅ 支持Debug/Release双模式编译
  • ✅ 主机调试器集成(容器内外调试支持)
  • ✅ 调试路径映射(容器→主机路径转换)
  • ✅ 编译命令数据库导出(IDE集成)
  • ✅ 完整的外设支持:CAN、SPI、UART、GPIO、TIM(PWM)、USB OTG FS
  • ✅ SEGGER RTT实时传输库集成
  • ✅ ARM CMSIS标准库完整实现
  • ✅ 多编译器兼容性(ArmCC、GCC、IAR等)
  • ✅ TrustZone安全扩展支持

代码统计

  • 总新增行数:~15,000+
  • CMake配置:~300行
  • HAL驱动程序:~2,500行
  • CMSIS库:~11,000+行

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@qzhhhi qzhhhi changed the base branch from main to dev/cboard-middle February 16, 2026 14:02
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qzhhhi commented Feb 16, 2026

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Actionable comments posted: 5

🤖 Fix all issues with AI agents
In `@firmware/c_board/bsp/HAL/Core/Src/syscalls.c`:
- Around line 67-90: The _read and _write implementations call weak symbols
__io_getchar and __io_putchar which are not implemented in this repo; add
concrete implementations or safe fallbacks for these symbols (or replace weak
declarations) so stdio I/O is well-defined. Specifically, implement functions
named __io_getchar() and __io_putchar(int ch) that route to your board
UART/console HAL (or provide stub behaviors that return EOF/ignore writes),
ensure the prototypes/signatures match the weak declarations in syscalls.c, and
register/enable the underlying UART initialization so _read/_write operate
correctly at runtime.

In `@firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/cmsis_iccarm.h`:
- Around line 648-651: The __ROR(uint32_t op1, uint32_t op2) implementation
performs undefined shifts when op2 == 0 or op2 >= 32; change it to normalize op2
modulo 32, return op1 when op2 == 0, and otherwise compute the rotate as (op1 >>
op2) | (op1 << (32U - op2)). Update the __ROR function to do: op2 %= 32U; if
(op2 == 0U) return op1; return (op1 >> op2) | (op1 << (32U - op2)); so it
matches other CMSIS implementations and avoids undefined behavior.

In `@firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/core_cm1.h`:
- Line 319: NVIC_Type 结构体中保留字段名拼写错误:将当前的 RSERVED1 更正为 RESERVED1(与同结构体的
RESERVED0/2/3/4 保持一致)以修复命名不一致的问题;在 core_cm1.h 中更新该标识符并同步检查并修正其他受影响的 CMSIS 头文件(如
core_sc000.h、core_starmc1.h、core_cm55.h、core_cm85.h、core_cm33.h、core_cm35p.h、core_cm23.h)中的同名拼写以保持一致性。

In `@firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/mpu_armv8.h`:
- Around line 82-93: The Doxygen tag typo in the ARM_MPU_RBAR comment (currently
"\oaram XN") prevents parameter documentation for XN from being generated;
update the comment block above the ARM_MPU_RBAR macro replacing "\oaram" with
the correct "\param" for the XN parameter so the Doxygen parser recognizes and
includes the XN description.

In `@firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/pmu_armv8.h`:
- Around line 134-137: The macro ARM_PMU_MVE_ST_MULTI_RETIRED is incorrectly
defined as 0x0261 (duplicate of ARM_PMU_MVE_LD_MULTI_SPEC); update the
definition for ARM_PMU_MVE_ST_MULTI_RETIRED to the correct event code 0x0264 so
the event mapping is unique and matches the Armv8.1‑M Performance Monitoring
User Guide.
🧹 Nitpick comments (10)
firmware/c_board/bsp/HAL/Drivers/CMSIS/Device/ST/STM32F4xx/LICENSE.txt (1)

3-3: 精简措辞以减少冗余。

“outside of”可简化为“outside”,让句子更简洁。

📝 建议改动
- software component outside of a package or without applicable license terms,
+ software component outside a package or without applicable license terms,
firmware/c_board/bsp/HAL/Core/Src/sysmem.c (1)

53-79: 标准的 STM32CubeMX 生成代码,实现正确。

这是标准的 newlib _sbrk 实现,内存布局和边界检查逻辑正确。

有两个可选的改进建议供参考:

  1. 负增量边界检查:当 incr 为负值时(释放内存),当前检查 __sbrk_heap_end + incr > max_heap 不会捕获堆指针下溢到 _end 以下的情况。
  2. RTOS 环境下的线程安全:如果在多任务环境中使用,可能需要添加临界区保护。

如果项目仅在单任务环境中运行且不依赖负增量场景,当前实现完全可以接受。

♻️ 可选:添加负增量边界检查
   /* Protect heap from growing into the reserved MSP stack */
-  if (__sbrk_heap_end + incr > max_heap)
+  if (__sbrk_heap_end + incr > max_heap ||
+      __sbrk_heap_end + incr < &_end)
   {
     errno = ENOMEM;
     return (void *)-1;
   }
firmware/c_board/bsp/HAL/Core/Src/syscalls.c (1)

99-104: _fstat_stat 缺少 NULL 指针检查(可选改进)。

这是标准的 STM32CubeMX 生成代码,在正常使用场景下 C 库会传递有效指针。作为防御性编程的可选改进,可以添加空指针检查:

🛡️ 可选:添加防御性空指针检查
 int _fstat(int file, struct stat *st)
 {
   (void)file;
+  if (st == NULL) {
+    errno = EFAULT;
+    return -1;
+  }
   st->st_mode = S_IFCHR;
   return 0;
 }

同样适用于 _stat 函数。

Also applies to: 148-153

firmware/c_board/bsp/HAL/CMakePresets.json (1)

9-9: 缩进不一致:此处使用了 Tab 而非空格。

第 9 行使用了 Tab 字符缩进,而文件其他部分均使用空格缩进。建议统一使用空格以保持一致性。

🔧 建议修复
-		    "toolchainFile": "${sourceDir}/cmake/gcc-arm-none-eabi.cmake",
+            "toolchainFile": "${sourceDir}/cmake/gcc-arm-none-eabi.cmake",
firmware/c_board/bsp/HAL/CMakeLists.txt (2)

10-13: 考虑添加 C++ 标准设置。

当前仅设置了 C11 标准。如果项目后续需要使用 C++ 源文件,建议同时添加 C++ 标准设置以保持一致性。

🔧 建议添加 C++ 标准设置
 # Setup compiler settings
 set(CMAKE_C_STANDARD 11)
 set(CMAKE_C_STANDARD_REQUIRED ON)
 set(CMAKE_C_EXTENSIONS ON)
+set(CMAKE_CXX_STANDARD 17)
+set(CMAKE_CXX_STANDARD_REQUIRED ON)
+set(CMAKE_CXX_EXTENSIONS OFF)

60-61: libob.a 移除的 workaround 建议添加注释说明。

这行代码移除了 libob.a 库依赖。注释提到是为了解决 C++ 文件的链接问题,但建议补充更详细的说明,例如此问题的来源或相关 issue 链接,便于后续维护。

firmware/c_board/bsp/HAL/Core/Inc/main.h (1)

29-37: stm32f4xx_hal.h 重复包含。

第 30 行已经包含了 stm32f4xx_hal.h,第 35 行在 USER CODE 区域又重复包含了一次。虽然有 include guard 保护不会造成编译错误,但这是冗余的。

♻️ 建议移除重复包含
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
 
-#include "stm32f4xx_hal.h"     // IWYU pragma: export
 `#include` "stm32f4xx_hal_def.h" // IWYU pragma: export
 `#include` "stm32f407xx.h"       // IWYU pragma: export
firmware/c_board/CMakePresets.json (1)

5-10: 建议为不同 preset 使用独立的构建目录。

当前所有 preset 共享同一个 binaryDir${sourceDir}/build)。在切换 preset(如从 debug 切换到 release)时,CMake 缓存可能会残留旧配置,导致构建问题。

♻️ 建议修改
         "name": "base",
         "hidden": true,
         "generator": "Ninja",
-        "binaryDir": "${sourceDir}/build",
+        "binaryDir": "${sourceDir}/build/${presetName}",
         "toolchainFile": "${sourceDir}/bsp/HAL/cmake/gcc-arm-none-eabi.cmake"
firmware/c_board/bsp/HAL/Core/Src/can.c (1)

41-56: AutoBusOffAutoRetransmission 禁用可能影响 CAN 通信可靠性。

  • AutoBusOff = DISABLE:当 CAN 控制器因总线错误进入 Bus-Off 状态后,需要手动恢复,可能导致通信中断
  • AutoRetransmission = DISABLE:发送失败的报文不会自动重传,可能导致消息丢失

如果这是有意为之(如实时控制场景需要避免重传延迟),请忽略此建议。否则建议启用以提高鲁棒性。

♻️ 建议启用自动恢复和重传
   hcan1.Init.TimeTriggeredMode = DISABLE;
-  hcan1.Init.AutoBusOff = DISABLE;
+  hcan1.Init.AutoBusOff = ENABLE;
   hcan1.Init.AutoWakeUp = DISABLE;
-  hcan1.Init.AutoRetransmission = DISABLE;
+  hcan1.Init.AutoRetransmission = ENABLE;

同样修改 MX_CAN2_Init 中的配置。

firmware/c_board/bsp/HAL/Core/Inc/stm32f4xx_hal_conf.h (1)

204-259: Ethernet PHY 占位宏需条件编译保护,防止后续启用 ETH 模块时出错。

当前 HAL_ETH_MODULE_ENABLED 处于禁用状态,但 DP83848_PHY_ADDRESSPHY_SRPHY_SPEED_STATUSPHY_DUPLEX_STATUS 等占位宏在配置文件中仍然无条件定义(行 204-259)。若后续启用 HAL_ETH_MODULE_ENABLED 而未补全这些宏的值,将导致编译或运行期错误。建议用 #ifdef HAL_ETH_MODULE_ENABLED 保护 Ethernet 配置段,或为这些占位宏提供有效的默认值。

Comment on lines +67 to +90
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
(void)file;
int DataIdx;

for (DataIdx = 0; DataIdx < len; DataIdx++)
{
*ptr++ = __io_getchar();
}

return len;
}

__attribute__((weak)) int _write(int file, char *ptr, int len)
{
(void)file;
int DataIdx;

for (DataIdx = 0; DataIdx < len; DataIdx++)
{
__io_putchar(*ptr++);
}
return len;
}
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⚠️ Potential issue | 🔴 Critical

🧩 Analysis chain

🏁 Script executed:

#!/bin/bash
# Search for __io_putchar and __io_getchar implementations (non-weak declarations)
echo "=== Searching for __io_putchar implementation ==="
rg -n --type c '__io_putchar' -g '!syscalls.c' firmware/

echo ""
echo "=== Searching for __io_getchar implementation ==="
rg -n --type c '__io_getchar' -g '!syscalls.c' firmware/

echo ""
echo "=== Also checking for any weak declarations of these functions ==="
rg -n --type c -A 2 '__attribute__.*weak.*__io_' firmware/

Repository: Alliance-Algorithm/librmcs

Length of output: 238


🏁 Script executed:

cat -n firmware/c_board/bsp/HAL/Core/Src/syscalls.c | head -110

Repository: Alliance-Algorithm/librmcs

Length of output: 2880


_read_write 依赖未实现的弱符号 __io_getchar/__io_putchar

在当前代码库中未找到 __io_getchar__io_putchar 的实现。这两个函数被声明为弱符号(第 35-36 行),在 _read(第 74 行)和 _write(第 87 行)中被直接调用。如果这些弱符号未被链接的其他库或项目代码实现,调用时会导致未定义行为。

需要确保在项目中提供这些 I/O 函数的实现(例如通过 UART 重定向),否则读写操作将无法正常工作。

🤖 Prompt for AI Agents
In `@firmware/c_board/bsp/HAL/Core/Src/syscalls.c` around lines 67 - 90, The _read
and _write implementations call weak symbols __io_getchar and __io_putchar which
are not implemented in this repo; add concrete implementations or safe fallbacks
for these symbols (or replace weak declarations) so stdio I/O is well-defined.
Specifically, implement functions named __io_getchar() and __io_putchar(int ch)
that route to your board UART/console HAL (or provide stub behaviors that return
EOF/ignore writes), ensure the prototypes/signatures match the weak declarations
in syscalls.c, and register/enable the underlying UART initialization so
_read/_write operate correctly at runtime.

Comment on lines +648 to +651
__IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
{
return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
}
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⚠️ Potential issue | 🟠 Major

🧩 Analysis chain

🏁 Script executed:

# First, let's find and read the specific file and lines
find . -path "*cmsis_iccarm.h" -type f 2>/dev/null

Repository: Alliance-Algorithm/librmcs

Length of output: 133


🏁 Script executed:

# If found, read the specific lines around 648-651
if [ -f "firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/cmsis_iccarm.h" ]; then
  sed -n '640,660p' "firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/cmsis_iccarm.h"
fi

Repository: Alliance-Algorithm/librmcs

Length of output: 697


🏁 Script executed:

# Search for __ROR usages across the codebase
rg "__ROR" --type c --type h -B 2 -A 2

Repository: Alliance-Algorithm/librmcs

Length of output: 7408


🏁 Script executed:

# Look for similar rotate implementations in other CMSIS files
find . -path "*CMSIS*" -name "*.h" -type f 2>/dev/null | head -20

Repository: Alliance-Algorithm/librmcs

Length of output: 1403


🏁 Script executed:

# Check if there are rotate left/right implementations in other headers
rg "ROR|ROL|rotate" --type h -i -l 2>/dev/null | head -10

Repository: Alliance-Algorithm/librmcs

Length of output: 657


🏁 Script executed:

# Let's verify the GCC implementation to see the full fix pattern
sed -n '1,100p' firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/cmsis_gcc.h | grep -A 8 "__ROR"

Repository: Alliance-Algorithm/librmcs

Length of output: 52


🏁 Script executed:

# Check armclang implementation as well
sed -n '1,100p' firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/cmsis_armclang.h | grep -A 8 "__ROR"

Repository: Alliance-Algorithm/librmcs

Length of output: 52


🏁 Script executed:

# Find the __ROR implementation in cmsis_gcc.h
rg -A 6 "__STATIC_FORCEINLINE uint32_t __ROR" firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/cmsis_gcc.h

Repository: Alliance-Algorithm/librmcs

Length of output: 190


🏁 Script executed:

# Find the __ROR implementation in cmsis_armclang.h
rg -A 6 "__STATIC_FORCEINLINE uint32_t __ROR" firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/cmsis_armclang.h

Repository: Alliance-Algorithm/librmcs

Length of output: 190


修复 __ROR 函数在 op2=0 或 op2≥32 时的 C 语言未定义行为

当前实现未对 op2 进行范围检查,当 op2=0 时 (op1 << 32) 或 op2≥32 时会违反 C 标准(移位位数不得等于或超过操作数位宽)。GCC、Clang 等其他 CMSIS 实现均采用 modulo 32 的方式处理,IAR 应保持一致。

建议改为:

op2 %= 32U;
if (op2 == 0U) {
  return op1;
}
return (op1 >> op2) | (op1 << (32U - op2));
🤖 Prompt for AI Agents
In `@firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/cmsis_iccarm.h` around lines
648 - 651, The __ROR(uint32_t op1, uint32_t op2) implementation performs
undefined shifts when op2 == 0 or op2 >= 32; change it to normalize op2 modulo
32, return op1 when op2 == 0, and otherwise compute the rotate as (op1 >> op2) |
(op1 << (32U - op2)). Update the __ROR function to do: op2 %= 32U; if (op2 ==
0U) return op1; return (op1 >> op2) | (op1 << (32U - op2)); so it matches other
CMSIS implementations and avoids undefined behavior.

__IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
uint32_t RESERVED0[31U];
__IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
uint32_t RSERVED1[31U];
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⚠️ Potential issue | 🟡 Minor

🧩 Analysis chain

🏁 Script executed:

# Check the specific line in question
cat -n firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/core_cm1.h | sed -n '315,325p'

Repository: Alliance-Algorithm/librmcs

Length of output: 816


🏁 Script executed:

# Search for RSERVED and RESERVED patterns in CMSIS headers
rg -n "RSERVED|RESERVED" --type=c firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/

Repository: Alliance-Algorithm/librmcs

Length of output: 50382


🏁 Script executed:

# Specifically check core_cm0.h line 317 for comparison
cat -n firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/core_cm0.h | sed -n '315,325p'

Repository: Alliance-Algorithm/librmcs

Length of output: 817


修复 NVIC_Type 结构体中的拼写错误,并注意该问题的广泛性

RSERVED1 应为 RESERVED1(缺少字母 'E')。对比 core_cm0.h 第 319 行的 RESERVED1(正确拼写)以及同一结构体中 RESERVED0RESERVED2RESERVED3RESERVED4,命名应保持一致。

注意:该拼写错误不仅存在于 core_cm1.h,还出现在多个 CMSIS 头文件中(core_sc000.h、core_starmc1.h、core_cm55.h、core_cm85.h、core_cm33.h、core_cm35p.h、core_cm23.h),这表明该问题可能源自上游 ARM CMSIS 源码。虽然这些是保留字段不影响功能,但建议修正以保持命名一致性。

🤖 Prompt for AI Agents
In `@firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/core_cm1.h` at line 319,
NVIC_Type 结构体中保留字段名拼写错误:将当前的 RSERVED1 更正为 RESERVED1(与同结构体的 RESERVED0/2/3/4
保持一致)以修复命名不一致的问题;在 core_cm1.h 中更新该标识符并同步检查并修正其他受影响的 CMSIS 头文件(如
core_sc000.h、core_starmc1.h、core_cm55.h、core_cm85.h、core_cm33.h、core_cm35p.h、core_cm23.h)中的同名拼写以保持一致性。

Comment on lines +82 to +93
/** \brief Region Base Address Register value
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
* \param SH Defines the Shareability domain for this memory region.
* \param RO Read-Only: Set to 1 for a read-only memory region.
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
*/
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
(((BASE) & MPU_RBAR_BASE_Msk) | \
(((SH) << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
(((XN) << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
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⚠️ Potential issue | 🟡 Minor

修正 Doxygen 参数标签拼写错误。

ARM_MPU_RBAR 注释里的 \oaram 应为 \param,否则生成的文档会丢失参数说明。

🛠️ 建议修正
-* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
+* \param XN eXecute Never: Set to 1 for a non-executable memory region.
📝 Committable suggestion

‼️ IMPORTANT
Carefully review the code before committing. Ensure that it accurately replaces the highlighted code, contains no missing lines, and has no issues with indentation. Thoroughly test & benchmark the code to ensure it meets the requirements.

Suggested change
/** \brief Region Base Address Register value
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
* \param SH Defines the Shareability domain for this memory region.
* \param RO Read-Only: Set to 1 for a read-only memory region.
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
*/
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
(((BASE) & MPU_RBAR_BASE_Msk) | \
(((SH) << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
(((XN) << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
/** \brief Region Base Address Register value
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
* \param SH Defines the Shareability domain for this memory region.
* \param RO Read-Only: Set to 1 for a read-only memory region.
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
* \param XN eXecute Never: Set to 1 for a non-executable memory region.
*/
`#define` ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
(((BASE) & MPU_RBAR_BASE_Msk) | \
(((SH) << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
(((XN) << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
🤖 Prompt for AI Agents
In `@firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/mpu_armv8.h` around lines 82 -
93, The Doxygen tag typo in the ARM_MPU_RBAR comment (currently "\oaram XN")
prevents parameter documentation for XN from being generated; update the comment
block above the ARM_MPU_RBAR macro replacing "\oaram" with the correct "\param"
for the XN parameter so the Doxygen parser recognizes and includes the XN
description.

Comment on lines +134 to +137
#define ARM_PMU_MVE_LD_MULTI_RETIRED 0x0260 /*!< MVE memory load instruction targeting multiple registers architecturally executed */
#define ARM_PMU_MVE_LD_MULTI_SPEC 0x0261 /*!< MVE memory load instruction targeting multiple registers speculatively executed */
#define ARM_PMU_MVE_ST_MULTI_RETIRED 0x0261 /*!< MVE memory store instruction targeting multiple registers architecturally executed */
#define ARM_PMU_MVE_ST_MULTI_SPEC 0x0265 /*!< MVE memory store instruction targeting multiple registers speculatively executed */
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⚠️ Potential issue | 🟠 Major

🧩 Analysis chain

🏁 Script executed:

# 首先查看文件内容,确认第 134-137 行的代码
cat -n firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/pmu_armv8.h | sed -n '130,140p'

Repository: Alliance-Algorithm/librmcs

Length of output: 1824


🌐 Web query:

Arm CMSIS pmu_armv8.h MVE event codes ARM_PMU_MVE_ST_MULTI_RETIRED correct value

💡 Result:

ARM_PMU_MVE_ST_MULTI_RETIRED should be 0x0264 (MVE memory store instruction targeting multiple registers, architecturally executed). This matches Arm’s Armv8.1‑M Performance Monitoring User Guide event table, where 0x0264 = MVE_ST_MULTI_RETIRED. [1]

The 0x0261 value seen in some pmu_armv8.h copies is inconsistent because 0x0261 is already used for ARM_PMU_MVE_LD_MULTI_SPEC in CMSIS documentation, indicating the ST_MULTI_RETIRED define there is likely a typo. [2]

Practical fix: override/patch your header to:

`#define` ARM_PMU_MVE_ST_MULTI_RETIRED  0x0264

Sources: Arm PMU user guide table [1], CMSIS PMU event definitions page showing the conflicting 0x0261 entries [2].

[1] https://www.scribd.com/document/723966350/ARM-an-ARMv8-1-M-Performance-Monitoring-User-Guide
[2] https://arm-software.github.io/CMSIS_6/v6.0.0/Core/group__pmu8__events__armv81.html


事件编码重复:ARM_PMU_MVE_ST_MULTI_RETIRED 定义错误。

第 136 行中 ARM_PMU_MVE_ST_MULTI_RETIRED 定义为 0x0261,与第 135 行的 ARM_PMU_MVE_LD_MULTI_SPEC 编码重复,会导致性能计数器事件映射错误。根据官方 Arm Armv8.1‑M Performance Monitoring User GuideARM_PMU_MVE_ST_MULTI_RETIRED 应为 0x0264

修正:

`#define` ARM_PMU_MVE_ST_MULTI_RETIRED                 0x0264             /*!< MVE memory store instruction targeting multiple registers architecturally executed */
🤖 Prompt for AI Agents
In `@firmware/c_board/bsp/HAL/Drivers/CMSIS/Include/pmu_armv8.h` around lines 134
- 137, The macro ARM_PMU_MVE_ST_MULTI_RETIRED is incorrectly defined as 0x0261
(duplicate of ARM_PMU_MVE_LD_MULTI_SPEC); update the definition for
ARM_PMU_MVE_ST_MULTI_RETIRED to the correct event code 0x0264 so the event
mapping is unique and matches the Armv8.1‑M Performance Monitoring User Guide.

@qzhhhi qzhhhi closed this Feb 16, 2026
@github-project-automation github-project-automation bot moved this from Todo to Done in RMCS Slave SDK Feb 16, 2026
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