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HirunaVishwamith/README.md

Hi, I'm Hiruna Vishwamith

FPGA Design Engineer @ Apex Compute
Focused on FPGA design, digital systems, embedded development, and hardware-oriented computing.

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  1. ASTRA ASTRA Public

    ASTRA - Autonomous Satellite Traffic and Routing Architecture

    Python

  2. fyp18-riscv-emulator fyp18-riscv-emulator Public

    Forked from Kaveesha-98/fyp18-riscv-emulator

    C++

  3. Mt-Benchmark Mt-Benchmark Public

    C

  4. RISCV-OOO-QuadCore RISCV-OOO-QuadCore Public

    Scala