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Merged
merged 2,140 commits into from
Nov 16, 2025
Merged

Jtools merge #15

merged 2,140 commits into from
Nov 16, 2025
+774,220 −0

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@mikanystrom-intel
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@mikanystrom-intel mikanystrom-intel commented Nov 15, 2025

Pull request to add the Java front-end tools from NCL.

harryliu-intel and others added 30 commits March 27, 2023 05:26
@harryliu-intel
Resolves bug 29361. Allow read after send, if the channel has been
f765cb4 
peeked before send.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 364653]
@amlines
Set dbuPerUU in ExportOAS using MfgGrid.
008db33 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 364667]
@amlines
Update DoFill for Intel3 and make the receipe an option.
b10ae98 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 364668]
@amlines
Keep prerouted vias in DEF now that BUG 29315 is mostly fixed.
b368716 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 364757]
@harryliu-intel
Better handling when flattening and a subckt is not found.
9114c25 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 364924]
@harryliu-intel
Set maximum line length on commandline.
5a04ba7 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 364925]
add a utility function to flip instances upside down
4fed6b0 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 364984]
@harryliu-intel
Derive power and ground nets from directives.
c4f26d3 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365021]
@harryliu-intel
Optionally specify log file to write to.
b91aed0 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365046]
don't place a v10 if there's not enough room
ef1bde4 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365137]
@amlines
Add FixUpsidedownHalo function and call it during RouteImport
ee92594 
to work around BUG 29468 for now.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 365167]
@amlines
Add check for overlapping pins to RouteExport.
b39bfda 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365198]
@amlines
Don't select overlapping pins when checking in RouteExport.
eca3db2 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365200]
@amlines
Don't set preroute nets to "locked" so that Proteus can edit them la…
11109eb 
…ter.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 365212]
@amlines
Back to locking preroutes. See BUG 29471.
c38b634 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365213]
@amlines
Fix PowerV10 to more accurately decide when there is enough
c2bc738 
m10 line enclosure to draw V10.  Should resolve floating M11
in FIN2.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 365227]
@amlines
Classify ^ZM* as metvia violation too.
898ef29 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365241]
@amlines
Optimize creation of cellmap for ExportOAS.
5292218 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365438]
@amlines
Use better optimized WriteCellmap in ExportGDS as well.
70858e1 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365450]
@amlines
Shouldn't be executable.
2487af4 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365465]
@amlines
Fix ?renameTop feature of ExportGDS and support it in ExportOAS as w…
6f06ceb 
…ell.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 365468]
@amlines
Fix follow-on task=gds2 writing problem due to some silly
fc1376c 
script copying the cellmap back from cdswd to final location.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 365470]
unshelve and submit Harry's change 365469 to color blockages
70ac6a4 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365473]
add a step to Colorize the abstract view
e79ce8f 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365474]
refer to pdk for LEF version
19b62d8 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365477]
@amlines
Optimize FindSubcells by using CV->instHeaders and avoiding
a673efa 
       append.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 365488]
@amlines
Set topHalo=t by default.
063cbb8 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365524]
add fatal error to inplace pin processing and plumb through the funct…
2aef610 
…ions.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 365544]
add inPlacePins key to RouteExport so it will by default throw an err…
ef5962d 
…or if any pin is drawn inplace. also adds a test in CheckPinsForExport that every pin is drawn.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 365545]
fix spurious file loading
5a5387e 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 365548]
harryliu-intel and others added 28 commits June 16, 2025 09:26
@harryliu-intel
In the client spec, change default to be inclusive.
e67b272 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 371801]
@harryliu-intel
Correctly pass on ignoreUnimpl.
de0d17c 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 371866]
@amlines
Allow LegalizeInstances to fix I0S and I0M halo cells.
e08d33d 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 371896]
@amlines
Switch to ":" to separate node lists in hsim.pl because "," is
1c839e6 
used in node names.  This bug has been there forever but only
just appeared in the MAC_2x2, which measures XS[0,0].C.q.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 371981]
@amlines
Factor out NearbyVia for RouteNearby. Use it to implement
37969ea 
       DrawVia for bus wires.  Seems to work great.  Requires
       corresponding PDK change.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 372018]
@RobertKarmazin
Add corner for SDF simulation working directory
3815bab 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 372027]
@amlines
Defun FloorplanOverlap alias for FL_Overlap.
ac2af36 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 372028]
@amlines
Cleanup of ImportOAS with better comments and removing cruft.
cc30708 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 372037]
@RobertKarmazin
Updated power file name
bb226bc 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 372140]
@RobertKarmazin
Expose reset duration as top level option. Disable SDF timing warning…
ef87a66 
…s while reset is asserted (cleans up simulation log)

[git-p4: depot-paths = "//mrl/sw/intel/": change = 372141]
@amlines
Classing ^SM and ^SV as metvia errors.
28cf428 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 372170]
@amlines
Handle paths in sub-lve-root-dir. Avoid duplicate power
a6a7eca 
       supplies if two power_nets are aliased together.  Use
       set_duplicate_rule to allow multiple imports of the same
       hierarchical spice files.  To support spice of FIN3B TEST
       block for SRAM_DUT debug.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 372272]
@RobertKarmazin
Fix typo in warning message(s)
44ddf0e 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 372287]
@RobertKarmazin
Include power_mon module in VCS compile scripts only when --power opt…
425a6e9 
…ion is used

[git-p4: depot-paths = "//mrl/sw/intel/": change = 372310]
@prasadpjoshi
Add better dependency checking. Also fix the assumption that a macro…
584f5cc 
… needs _D_ in its string, thereby also filtering ntvsrams which are not treated as macros.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 372315]
@amlines
Add --cds-lib= option to virtuoso_replay for importing cell libraries.
3757a5a 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 372327]
@amlines
Fix alignment of G1M cells and halos.
7699d22 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 372355]
@amlines
Enable ColorizeByOverlap in 1276[.4] process by default.
12e161d 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 372386]
@amlines
Run ImportOASLib in temp/import directory.
d5bacc1 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 372430]
@RobertKarmazin
New script to parse out vectors generated by ATPG tool. Next step, ex…
062331e 
…port to CAST

[git-p4: depot-paths = "//mrl/sw/intel/": change = 372635]
@amlines
Align mid-level cells the same as G1I cells (like we do for 1278.3).
36d6e0c 
[git-p4: depot-paths = "//mrl/sw/intel/": change = 372660]
@harryliu-intel
Don't find dynamic nodes if the verilog lvs block exists to avoid long
8c6f311 
LVE runtimes on imported IP.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 372756]
@amlines
Fix DeletePins and DeletePinsByType to get the list of objects
917a4d7 
first and delete them second.  These avoids warnings about
deleted/purged objects.  I don't really understand why.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 372854]
@amlines
DeletePins deletes labels in a second pass because most of
4d778ef 
them get deleted with the pins anyways.

[git-p4: depot-paths = "//mrl/sw/intel/": change = 372876]
@mikanystrom-intel
update copyright info
13a662f
@mikanystrom-intel
add copyright statements to infrastructure
8332411
@mikanystrom-intel
Merge remote-tracking branch 'jtools/master' into jtools-merge
1ff1f3b
@mikanystrom-intel
add some basic documentation
ded5a56
@michaelbeale-IL michaelbeale-IL merged commit 78d3b55 into main Nov 16, 2025
4 checks passed
@michaelbeale-IL michaelbeale-IL deleted the jtools-merge branch November 16, 2025 22:56
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7 participants

@mikanystrom-intel @michaelbeale-IL @harryliu-intel @amlines @RobertKarmazin @hillbenj @prasadpjoshi