Cherry-pick from upstream #6
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The GSPI and QSPI peripherals run on the interface PLL clock. To ensure correct operation, the interface PLL frequency should be set to 160 MHz. This provides a base clock of 80 MHz to the QSPI peripheral, which matches its required operating frequency. The GSPI peripheral can continue to operate at higher frequencies as it receives the full interface PLL clock. Signed-off-by: Sai Santhosh Malae <[email protected]> (cherry picked from commit cbb2fda) Upstream-status: available
Add gspi_siwx91x_pick_lower_freq() to select the nearest lower supported GSPI clock frequency based on the requested value. The GSPI clock can operate only at discrete frequencies such as 80 MHz, 40 MHz, 26.6 MHz, 20 MHz, and so on (80 MHz divided by integer factors). If the requested frequency does not match one of these valid steps, it is rounded down to the nearest lower supported frequency. The driver now logs both the requested and the actual programmed frequency along with the divider value, helping users verify the effective SPI clock configuration. Signed-off-by: Sai Santhosh Malae <[email protected]> (cherry picked from commit 23c8db4) Upstream-status: available
Enable higher SPI burst sizes when using GPDMA to improve throughput. Bursts are only enabled when both TX and RX channels use GPDMA and the SPI clock frequency is at least 10 MHz, as DMA flow control is unreliable at lower SPI rates. Signed-off-by: Sai Santhosh Malae <[email protected]> (cherry picked from commit 9ebba68) Upstream-status: available
Updated mosi_overrun alignment from 4 bytes to 32 bytes to ensure compatibility with the GPDMA driver. This prevents alignment-related errors during DMA transfers. Signed-off-by: Sai Santhosh Malae <[email protected]> (cherry picked from commit b6cef6f) Upstream-status: available
Swap the write and read data paths within the GSPI controller to ensure correct data is seen on the SPI lines during 16-bit transfers. Signed-off-by: Sai Santhosh Malae <[email protected]> (cherry picked from commit d4b551b) Upstream-status: available
Guard callback registration with CONFIG_SPI_ASYNC to avoid build error for blocking SPI transfers using DMA Signed-off-by: Sai Santhosh Malae <[email protected]> (cherry picked from commit f8b5b77) Upstream-status: available
Increase CONFIG_SPI_IDEAL_TRANSFER_DURATION_SCALING to compensate for the additional burst size calculation in the SPI driver, which slightly increases transfer time. Signed-off-by: Sai Santhosh Malae <[email protected]> (cherry picked from commit 649e1f6) Upstream-status: available
Add overlay and config files for siwx917_rb4342a to enable the spi_loopback test. Signed-off-by: Sai Santhosh Malae <[email protected]> (cherry picked from commit b82944e) Upstream-status: available
Added a MAC-layer filter to discard frames whose source MAC address matches the devices own MAC address. These packets are looped-back frames that do not need to be processed again by the network stack. Dropping such frames early improves correctness, avoids redundant RX processing, and reduces load on the IPv4/IPv6 protocol handlers. This patch is a workaround for a bug in the NWP Signed-off-by: Swamidas Nampalli <[email protected]> (cherry picked from commit c2f8f98) Upstream-status: available
The existing device runtime PM model requires applications to call pm_device_runtime_get()/put() on the GPIO controller device directly, which is not ideal when GPIO ports are exposed as child nodes. This update enables runtime PM at the GPIO port (child node) level, allowing applications to manage power through the port devices instead of the top-level controller. Signed-off-by: Sai Santhosh Malae <[email protected]> (cherry picked from commit 76b1a07) Upstream-status: available
Update the gpio_basic_api test to support device runtime power management. This ensures the test runs correctly when runtime PM is enabled on GPIO devices. Signed-off-by: Sai Santhosh Malae <[email protected]> (cherry picked from commit 0ceef4f) Upstream-status: available
Without this clock definition, you will get compilation error when using acmp device on board that use xg21 SoC. Signed-off-by: Martin Hoff <[email protected]> (cherry picked from commit 62e97eb) Upstream-status: available
This patch introduce multiple silabs boards overlay that are needed to test different ip version of the peripheral. Signed-off-by: Martin Hoff <[email protected]> (cherry picked from commit 25362f7) Upstream-status: available
Martinhoff-maker
approved these changes
Dec 8, 2025
jerome-pouiller
approved these changes
Dec 8, 2025
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Cherry-pick 4 PRs from upstream.