Cherry-pick from upstream #7
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This patch add the clock-frequency property for two board. Without this patch, the frequency is silently set to 1 Mhz which can introduce some lack of understanding. Signed-off-by: Martin Hoff <[email protected]> (cherry picked from commit 7c87f23) Upstream-status: available
This patch introduces overlay for xg23_rb4210a for the spi_loopback test. It is needed because it has another peripheral ip version than all the other already tested board. Signed-off-by: Martin Hoff <[email protected]> (cherry picked from commit a0602f0) Upstream-status: available
SYS_CLOCK_HW_CYCLES_TO_NS_AVG is not correct since we are tracking cpu tick and SYS_CLOCK_HW_CYCLES_TO_NS_AVG convert it with the clock frequency. This patch used the correct conversion function (same api as function to get the timestamp). Signed-off-by: Martin Hoff <[email protected]> (cherry picked from commit da6cd1a) Upstream-status: available
This fix addresses a PM failure caused by an inconsistency between the device tree and the build system. The device tree was updated with `reg = <0x00000400 DT_SIZE_K(319)>;`, but the corresponding value for `SL_SI91X_SI917_RAM_MEM_CONFIG` in CMakeLists.txt was not updated, leading to the problem. The build system now automatically sets `SL_SI91X_SI917_RAM_MEM_CONFIG` based on the sram0 RAM size from the device tree using `dt_prop()` and `list(GET)`, ensuring the configuration matches the device tree and preventing future mismatches. Signed-off-by: S Mohamed Fiaz <[email protected]> Upstream-status: pr <zephyrproject-rtos#100779>
jerome-pouiller
approved these changes
Dec 10, 2025
jhedberg
approved these changes
Dec 10, 2025
jhedberg
merged commit f700b5c
into
SiliconLabsSoftware:silabs/v2025.12
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Cherry-pick 3 merged PRs and one pending PR.