Release 1.3.7

Release 1.3.7 (See ERRATA for unsupported features)

• Support for Xilinx SDx/Vivado 2017.1 and Xilinx SDx/Vivado 2017.4 . * This release supports Xilinx SDx 2017.4 and 2017.1. The HDK and SDAccel setup scripts configure the development environment based on the tool version found in the PATH environment variable.
  • FPGA developer kit version is listed in hdk_version.txt
  • FPGA developer kit supported tool versions are listed in supported_vivado_versions
  • The compatibility table describes the mapping of developer kit version to FPGA developer AMI version:

Developer Kit Version	Tool Version Supported	Compatible FPGA developer AMI Version
1.3.0-1.3.6	2017.1	v1.3.5
1.3.7-1.3.X	2017.1	v1.3.5-v1.3.X (Xilinx SDx 2017.1)
1.3.7-1.3.X	2017.4	v1.4.0-v1.4.X (Xilinx SDx 2017.4)

• OpenCL dynamic resource optimization – The developer tools automatically remove unused DDR and debug logic to free up resources and reduce compile times. See 2017.4 Migration Document and SDAccel User Guide
• Developers can instantiate up to 60 kernels (up from the max 16 2017.1 supported).
• OpenCL Kernel profiling – During compile time, profiling logic can be automatically inserted to enable generation of kernel profile data. Profile data can be viewed using the SDx IDE under profile summary report and timeline trace report. See chapter 6 within the SDAccel Environment Profiling and Optimization Guide
• OpenCL Hardware Emulation Debug – GDB-like debug allows developers a view into what is going on inside the kernel during hardware emulation. Debug capabilities include start/stop at intermediate points and memory inspection. See chapter 6 within the SDAccel Environment Profiling and Optimization Guide
• Post-synthesis and place/route optimization is now supported in OpenCL development environment. New XOCC options: reuse_synth and reuse_impl
• Customer simulation environment improvements and bug fixes:
  • 8 Additional tests that will help developer with using the simulation environment and shell simulation model
  • Simulation model support for non DW aligned accesses
  • Co-simulation support
• EDMA Driver fixes:
  • Prevent timeouts due to scanning of the BARs for DMA hardware
  • Driver compilation support for 4.14 linux kernel
• HDK improvements and fixes:
  • cl_dram_dma improvements to make enabling/disabling DDRs easier
  • encrypt.tcl now clears out old files
  • URAM example timing improvements
• IPI Improvements:
  • HLS example
  • Script based approach for running the examples