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Tarcisio Fischer
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Fix lld crash wrt generated thunks growing away from the patched code
Original crash was observed in Chromium, in [1]. The empty buffer is actually from a Patch843419Section. When the patched code grows too much, it gets far away from the short jump, and the current implementation assumes a R_AARCH64_JUMP26 will be enough. This PR changes the implementation to: (1) In isAArch64BTILandingPad, checks if a section is synthetic, and assumes that it'll contain a landing pad (2) Suppress the size rounding for thunks that preceeds section (3) Reimplements the patch by using a R_AARCH64_ABS64 in case the patched code is still far away. [1] https://issues.chromium.org/issues/440019454
1 parent 59ed6df commit a7f7179

9 files changed

+124
-10
lines changed

‎lld/ELF/AArch64ErrataFix.cpp‎

Lines changed: 13 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -388,6 +388,8 @@ class elf::Patch843419Section final : public SyntheticSection {
388388
uint64_t patcheeOffset;
389389
// A label for the start of the Patch that we can use as a relocation target.
390390
Symbol *patchSym;
391+
// A label for the return location.
392+
Symbol *retSym;
391393
};
392394

393395
Patch843419Section::Patch843419Section(Ctx &ctx, InputSection *p, uint64_t off)
@@ -399,6 +401,12 @@ Patch843419Section::Patch843419Section(Ctx &ctx, InputSection *p, uint64_t off)
399401
ctx, ctx.saver.save("__CortexA53843419_" + utohexstr(getLDSTAddr())),
400402
STT_FUNC, 0, getSize(), *this);
401403
addSyntheticLocal(ctx, ctx.saver.save("$x"), STT_NOTYPE, 0, 0, *this);
404+
retSym = addSyntheticLocal(
405+
ctx, ctx.saver.save("__CortexA53843419_" + utohexstr(getLDSTAddr()) + "_ret"),
406+
STT_FUNC, off + 4, 4, *p);
407+
408+
// Relocation must be created as soon as possible, so it'll be picked up.
409+
addReloc({R_PC, R_AARCH64_JUMP26, 4, 0, retSym});
402410
}
403411

404412
uint64_t Patch843419Section::getLDSTAddr() const {
@@ -410,13 +418,12 @@ void Patch843419Section::writeTo(uint8_t *buf) {
410418
// patchee Section.
411419
write32le(buf, read32le(patchee->content().begin() + patcheeOffset));
412420

413-
// Apply any relocation transferred from the original patchee section.
414-
ctx.target->relocateAlloc(*this, buf);
421+
// Note: The jump back was configured in this classe's constructor, and
422+
// will be filled by the relocation. Adding the relocation here would be
423+
// too late.
415424

416-
// Return address is the next instruction after the one we have just copied.
417-
uint64_t s = getLDSTAddr() + 4;
418-
uint64_t p = patchSym->getVA(ctx) + 4;
419-
ctx.target->relocateNoSym(buf + 4, R_AARCH64_JUMP26, s - p);
425+
// Apply relocations
426+
ctx.target->relocateAlloc(*this, buf);
420427
}
421428

422429
void AArch64Err843419Patcher::init() {

‎lld/ELF/Arch/AArch64.cpp‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,11 @@ bool elf::isAArch64BTILandingPad(Ctx &ctx, Symbol &s, int64_t a) {
4848
if (off >= isec->getSize())
4949
return true;
5050
const uint8_t *buf = isec->content().begin();
51+
// Synthetic sections may have a size but empty data - Assume that they won't contain a landing pad
52+
if (buf == nullptr && dyn_cast<SyntheticSection>(isec) != nullptr) {
53+
return false;
54+
}
55+
5156
const uint32_t instr = read32le(buf + off);
5257
// All BTI instructions are HINT instructions which all have same encoding
5358
// apart from bits [11:5]

‎lld/ELF/Relocations.cpp‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1922,7 +1922,7 @@ ThunkSection *ThunkCreator::getISThunkSec(InputSection *isec) {
19221922
if (isec->outSecOff < first->outSecOff || last->outSecOff < isec->outSecOff)
19231923
continue;
19241924

1925-
ts = addThunkSection(tos, isd, isec->outSecOff);
1925+
ts = addThunkSection(tos, isd, isec->outSecOff, /* isPrefix */ true);
19261926
thunkedSections[isec] = ts;
19271927
return ts;
19281928
}
@@ -1981,11 +1981,12 @@ void ThunkCreator::createInitialThunkSections(
19811981

19821982
ThunkSection *ThunkCreator::addThunkSection(OutputSection *os,
19831983
InputSectionDescription *isd,
1984-
uint64_t off) {
1984+
uint64_t off,
1985+
bool isPrefix) {
19851986
auto *ts = make<ThunkSection>(ctx, os, off);
19861987
ts->partition = os->partition;
19871988
if ((ctx.arg.fixCortexA53Errata843419 || ctx.arg.fixCortexA8) &&
1988-
!isd->sections.empty()) {
1989+
!isd->sections.empty() && !isPrefix) {
19891990
// The errata fixes are sensitive to addresses modulo 4 KiB. When we add
19901991
// thunks we disturb the base addresses of sections placed after the thunks
19911992
// this makes patches we have generated redundant, and may cause us to

‎lld/ELF/Relocations.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -203,7 +203,7 @@ class ThunkCreator {
203203
std::pair<Thunk *, bool> getSyntheticLandingPad(Defined &d, int64_t a);
204204

205205
ThunkSection *addThunkSection(OutputSection *os, InputSectionDescription *,
206-
uint64_t off);
206+
uint64_t off, bool isPrefix = false);
207207

208208
bool normalizeExistingThunk(Relocation &rel, uint64_t src);
209209

‎lld/test/ELF/aarch64-cortex-a53-843419-address.s‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@
4141
// CHECK-NEXT: ff8: d0000020 adrp x0, 0x6000
4242
// CHECK-NEXT: ffc: f9400021 ldr x1, [x1]
4343
// CHECK-NEXT: 1000: 14000ff9 b 0x4fe4
44+
// CHECK: <__CortexA53843419_1000_ret>:
4445
// CHECK-NEXT: 1004: d65f03c0 ret
4546
.section .text.01, "ax", %progbits
4647
.balign 4096
@@ -63,6 +64,7 @@ $x.999:
6364
// CHECK-NEXT: 1ffc: b0000020 adrp x0, 0x6000
6465
// CHECK-NEXT: 2000: bd400021 ldr s1, [x1]
6566
// CHECK-NEXT: 2004: 14000bfa b 0x4fec
67+
// CHECK: <__CortexA53843419_2004_ret>:
6668
// CHECK-NEXT: 2008: d65f03c0 ret
6769
.globl t3_ffc_ldrsimd
6870
.type t3_ffc_ldrsimd, %function
@@ -100,6 +102,7 @@ t3_ff8_ldralldata:
100102
// CHECK-NEXT: 3ff8: f0000000 adrp x0, 0x6000
101103
// CHECK-NEXT: 3ffc: f9400021 ldr x1, [x1]
102104
// CHECK-NEXT: 4000: 140003fd b 0x4ff4
105+
// CHECK: <__CortexA53843419_4000_ret>:
103106
// CHECK-NEXT: 4004: d65f03c0 ret
104107
.space 4096 - 12
105108
.globl t3_ffc_ldr
@@ -132,6 +135,7 @@ t3_ff8_ldralldata:
132135
// CHECK-NEXT: 4ffc: d0000000 adrp x0, 0x6000
133136
// CHECK-NEXT: 5000: f9000021 str x1, [x1]
134137
// CHECK-NEXT: 5004: 140003fb b 0x5ff0
138+
// CHECK: <__CortexA53843419_5004_ret>:
135139
// CHECK-NEXT: 5008: d65f03c0 ret
136140

137141
.section .newisd, "ax", %progbits
@@ -157,6 +161,7 @@ t3_ffc_str:
157161
// CHECK-NEXT: 5ff8: b0000000 adrp x0, 0x6000
158162
// CHECK-NEXT: 5ffc: f9000021 str x1, [x1]
159163
// CHECK-NEXT: 6000: 14000003 b 0x600c
164+
// CHECK: <__CortexA53843419_6000_ret>:
160165
// CHECK-NEXT: 6004: d65f03c0 ret
161166

162167
.section .newos, "ax", %progbits

‎lld/test/ELF/aarch64-cortex-a53-843419-large.s‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,7 @@ t3_ff8_ldr:
4545
// CHECK3-NEXT: 211ff8: f00400e0 adrp x0, 0x8230000
4646
// CHECK3-NEXT: 211ffc: f9400021 ldr x1, [x1]
4747
// CHECK3-NEXT: 212000: 15800802 b 0x6214008
48+
// CHECK3: <__CortexA53843419_211000_ret>:
4849
// CHECK3-NEXT: 212004: d65f03c0 ret
4950

5051
.section .text.04, "ax", %progbits
@@ -66,6 +67,7 @@ t3_ff8_str:
6667
// CHECK4-NEXT: 4213ff8: b00200e0 adrp x0, 0x8230000
6768
// CHECK4-NEXT: 4213ffc: f9400021 ldr x1, [x1]
6869
// CHECK4-NEXT: 4214000: 14800004 b 0x6214010
70+
// CHECK4: <__CortexA53843419_4213000_ret>:
6971
// CHECK4-NEXT: 4214004: d65f03c0 ret
7072

7173
.section .text.06, "ax", %progbits
@@ -105,6 +107,7 @@ t3_ffc_ldr:
105107
// CHECK7-NEXT: 8211ffc: f00000e0 adrp x0, 0x8230000
106108
// CHECK7-NEXT: 8212000: f9400021 ldr x1, [x1]
107109
// CHECK7-NEXT: 8212004: 14000002 b 0x821200c
110+
// CHECK7: <__CortexA53843419_8212004_ret>:
108111
// CHECK7-NEXT: 8212008: d65f03c0 ret
109112
// CHECK7: <__CortexA53843419_8212004>:
110113
// CHECK7-NEXT: 821200c: f9400000 ldr x0, [x0]

‎lld/test/ELF/aarch64-cortex-a53-843419-recognize.s‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@
3333
// CHECK-NEXT: 211ff8: f0000260 adrp x0, 0x260000
3434
// CHECK-NEXT: 211ffc: f9400021 ldr x1, [x1]
3535
// CHECK-FIX: 212000: 1400c803 b 0x24400c
36+
// CHECK-FIX: <__CortexA53843419_212000_ret>:
3637
// CHECK-NOFIX: 212000: f9400000 ldr x0, [x0]
3738
// CHECK-NEXT: 212004: d65f03c0 ret
3839
// CHECK-RELOCATABLE: <t3_ff8_ldr>:
@@ -57,6 +58,7 @@ t3_ff8_ldr:
5758
// CHECK-NEXT: 213ff8: b0000260 adrp x0, 0x260000
5859
// CHECK-NEXT: 213ffc: bd400021 ldr s1, [x1]
5960
// CHECK-FIX: 214000: 1400c005 b 0x244014
61+
// CHECK-FIX: <__CortexA53843419_214000_ret>:
6062
// CHECK-NOFIX: 214000: f9400402 ldr x2, [x0, #8]
6163
// CHECK-NEXT: 214004: d65f03c0 ret
6264
.section .text.02, "ax", %progbits
@@ -75,6 +77,7 @@ t3_ff8_ldrsimd:
7577
// CHECK-NEXT: 215ffc: f0000240 adrp x0, 0x260000
7678
// CHECK-NEXT: 216000: bc408421 ldr s1, [x1], #8
7779
// CHECK-FIX: 216004: 1400b806 b 0x24401c
80+
// CHECK-FIX: <__CortexA53843419_216004_ret>:
7881
// CHECK-NOFIX: 216004: f9400803 ldr x3, [x0, #16]
7982
// CHECK-NEXT: 216008: d65f03c0 ret
8083
.section .text.03, "ax", %progbits
@@ -93,6 +96,7 @@ t3_ffc_ldrpost:
9396
// CHECK-NEXT: 217ff8: b0000240 adrp x0, 0x260000
9497
// CHECK-NEXT: 217ffc: bc008c21 str s1, [x1, #8]!
9598
// CHECK-FIX: 218000: 1400b009 b 0x244024
99+
// CHECK-FIX: <__CortexA53843419_218000_ret>:
96100
// CHECK-NOFIX: 218000: f9400c02 ldr x2, [x0, #24]
97101
// CHECK-NEXT: 218004: d65f03c0 ret
98102
.section .text.04, "ax", %progbits
@@ -111,6 +115,7 @@ t3_ff8_strpre:
111115
// CHECK-NEXT: 219ffc: f000023c adrp x28, 0x260000
112116
// CHECK-NEXT: 21a000: f9000042 str x2, [x2]
113117
// CHECK-FIX: 21a004: 1400a80a b 0x24402c
118+
// CHECK-FIX: <__CortexA53843419_21A004_ret>:
114119
// CHECK-NOFIX: 21a004: f900139c str x28, [x28, #32]
115120
// CHECK-NEXT: 21a008: d65f03c0 ret
116121
.section .text.05, "ax", %progbits
@@ -129,6 +134,7 @@ t3_ffc_str:
129134
// CHECK-NEXT: 21bffc: b000023c adrp x28, 0x260000
130135
// CHECK-NEXT: 21c000: b9000044 str w4, [x2]
131136
// CHECK-FIX: 21c004: 1400a00c b 0x244034
137+
// CHECK-FIX: <__CortexA53843419_21C004_ret>:
132138
// CHECK-NOFIX: 21c004: f9001784 str x4, [x28, #40]
133139
// CHECK-NEXT: 21c008: d65f03c0 ret
134140
.section .text.06, "ax", %progbits
@@ -147,6 +153,7 @@ t3_ffc_strsimd:
147153
// CHECK-NEXT: 21dff8: f000021d adrp x29, 0x260000
148154
// CHECK-NEXT: 21dffc: 38400841 ldtrb w1, [x2]
149155
// CHECK-FIX: 21e000: 1400980f b 0x24403c
156+
// CHECK-FIX: <__CortexA53843419_21E000_ret>:
150157
// CHECK-NOFIX: 21e000: f94003bd ldr x29, [x29]
151158
// CHECK-NEXT: 21e004: d65f03c0 ret
152159
.section .text.07, "ax", %progbits
@@ -165,6 +172,7 @@ t3_ff8_ldrunpriv:
165172
// CHECK-NEXT: 21fffc: b000021d adrp x29, 0x260000
166173
// CHECK-NEXT: 220000: b8404042 ldur w2, [x2, #4]
167174
// CHECK-FIX: 220004: 14009010 b 0x244044
175+
// CHECK-FIX: <__CortexA53843419_220004_ret>:
168176
// CHECK-NOFIX: 220004: f94007bd ldr x29, [x29, #8]
169177
// CHECK-NEXT: 220008: d65f03c0 ret
170178
.balign 4096
@@ -182,6 +190,7 @@ t3_ffc_ldur:
182190
// CHECK-NEXT: 221ffc: f00001f2 adrp x18, 0x260000
183191
// CHECK-NEXT: 222000: 78004043 sturh w3, [x2, #4]
184192
// CHECK-FIX: 222004: 14008812 b 0x24404c
193+
// CHECK-FIX: <__CortexA53843419_222004_ret>:
185194
// CHECK-NOFIX: 222004: f9400a41 ldr x1, [x18, #16]
186195
// CHECK-NEXT: 222008: d65f03c0 ret
187196
.section .text.09, "ax", %progbits
@@ -200,6 +209,7 @@ t3_ffc_sturh:
200209
// CHECK-NEXT: 223ff8: b00001f2 adrp x18, 0x260000
201210
// CHECK-NEXT: 223ffc: 58ffffe3 ldr x3, 0x223ff8
202211
// CHECK-FIX: 224000: 14008015 b 0x244054
212+
// CHECK-FIX: <__CortexA53843419_224000_ret>:
203213
// CHECK-NOFIX: 224000: f9400e52 ldr x18, [x18, #24]
204214
// CHECK-NEXT: 224004: d65f03c0 ret
205215
.section .text.10, "ax", %progbits
@@ -218,6 +228,7 @@ t3_ff8_literal:
218228
// CHECK-NEXT: 225ffc: f00001cf adrp x15, 0x260000
219229
// CHECK-NEXT: 226000: f8616843 ldr x3, [x2, x1]
220230
// CHECK-FIX: 226004: 14007816 b 0x24405c
231+
// CHECK-FIX: <__CortexA53843419_226004_ret>:
221232
// CHECK-NOFIX: 226004: f94011ea ldr x10, [x15, #32]
222233
// CHECK-NEXT: 226008: d65f03c0 ret
223234
.section .text.11, "ax", %progbits
@@ -236,6 +247,7 @@ t3_ffc_register:
236247
// CHECK-NEXT: 227ff8: b00001d0 adrp x16, 0x260000
237248
// CHECK-NEXT: 227ffc: a9000861 stp x1, x2, [x3]
238249
// CHECK-FIX: 228000: 14007019 b 0x244064
250+
// CHECK-FIX: <__CortexA53843419_228000_ret>:
239251
// CHECK-NOFIX: 228000: f940160d ldr x13, [x16, #40]
240252
// CHECK-NEXT: 228004: d65f03c0 ret
241253
.section .text.12, "ax", %progbits
@@ -254,6 +266,7 @@ t3_ff8_stp:
254266
// CHECK-NEXT: 229ffc: f00001a7 adrp x7, 0x260000
255267
// CHECK-NEXT: 22a000: a8000861 stnp x1, x2, [x3]
256268
// CHECK-FIX: 22a004: 1400681a b 0x24406c
269+
// CHECK-FIX: <__CortexA53843419_22A004_ret>:
257270
// CHECK-NOFIX: 22a004: f9400ce9 ldr x9, [x7, #24]
258271
// CHECK-NEXT: 22a008: d65f03c0 ret
259272
.section .text.13, "ax", %progbits
@@ -272,6 +285,7 @@ t3_ffc_stnp:
272285
// CHECK-NEXT: 22bffc: b00001b7 adrp x23, 0x260000
273286
// CHECK-NEXT: 22c000: 0d820420 st1 { v0.b }[1], [x1], x2
274287
// CHECK-FIX: 22c004: 1400601c b 0x244074
288+
// CHECK-FIX: <__CortexA53843419_22C004_ret>:
275289
// CHECK-NOFIX: 22c004: f94012f6 ldr x22, [x23, #32]
276290
// CHECK-NEXT: 22c008: d65f03c0 ret
277291
.section .text.14, "ax", %progbits
@@ -290,6 +304,7 @@ t3_ffc_st1singlepost:
290304
// CHECK-NEXT: 22dff8: f0000197 adrp x23, 0x260000
291305
// CHECK-NEXT: 22dffc: 4c00a020 st1 { v0.16b, v1.16b }, [x1]
292306
// CHECK-FIX: 22e000: 1400581f b 0x24407c
307+
// CHECK-FIX: <__CortexA53843419_22E000_ret>:
293308
// CHECK-NOFIX: 22e000: f94016f8 ldr x24, [x23, #40]
294309
// CHECK-NEXT: 22e004: d65f03c0 ret
295310
.section .text.15, "ax", %progbits
@@ -309,6 +324,7 @@ t3_ff8_st1multiple:
309324
// CHECK-NEXT: 22fffc: f9400021 ldr x1, [x1]
310325
// CHECK-NEXT: 230000: 8b000042 add x2, x2, x0
311326
// CHECK-FIX: 230004: 14005020 b 0x244084
327+
// CHECK-FIX: <__CortexA53843419_230004_ret>:
312328
// CHECK-NOFIX: 230004: f9400002 ldr x2, [x0]
313329
// CHECK-NEXT: 230008: d65f03c0 ret
314330
.section .text.16, "ax", %progbits
@@ -329,6 +345,7 @@ t4_ff8_ldr:
329345
// CHECK-NEXT: 232000: f9000042 str x2, [x2]
330346
// CHECK-NEXT: 232004: cb020020 sub x0, x1, x2
331347
// CHECK-FIX: 232008: 14004821 b 0x24408c
348+
// CHECK-FIX: <__CortexA53843419_232008_ret>:
332349
// CHECK-NOFIX: 232008: f900079b str x27, [x28, #8]
333350
// CHECK-NEXT: 23200c: d65f03c0 ret
334351
.section .text.17, "ax", %progbits
@@ -349,6 +366,7 @@ t4_ffc_str:
349366
// CHECK-NEXT: 233ffc: a9000861 stp x1, x2, [x3]
350367
// CHECK-NEXT: 234000: 9b107e03 mul x3, x16, x16
351368
// CHECK-FIX: 234004: 14004024 b 0x244094
369+
// CHECK-FIX: <__CortexA53843419_234004_ret>:
352370
// CHECK-NOFIX: 234004: f9400a0e ldr x14, [x16, #16]
353371
// CHECK-NEXT: 234008: d65f03c0 ret
354372
.section .text.18, "ax", %progbits
@@ -369,6 +387,7 @@ t4_ff8_stp:
369387
// CHECK-NEXT: 235ffc: a9810861 stp x1, x2, [x3, #16]!
370388
// CHECK-NEXT: 236000: 9b107e03 mul x3, x16, x16
371389
// CHECK-FIX: 236004: 14003826 b 0x24409c
390+
// CHECK-FIX: <__CortexA53843419_236004_ret>:
372391
// CHECK-NOFIX: 236004: f940060e ldr x14, [x16, #8]
373392
// CHECK-NEXT: 236008: d65f03c0 ret
374393
.section .text.19, "ax", %progbits
@@ -389,6 +408,7 @@ t4_ff8_stppre:
389408
// CHECK-NEXT: 237ffc: a8810861 stp x1, x2, [x3], #16
390409
// CHECK-NEXT: 238000: 9b107e03 mul x3, x16, x16
391410
// CHECK-FIX: 238004: 14003028 b 0x2440a4
411+
// CHECK-FIX: <__CortexA53843419_238004_ret>:
392412
// CHECK-NOFIX: 238004: f940060e ldr x14, [x16, #8]
393413
// CHECK-NEXT: 238008: d65f03c0 ret
394414
.section .text.20, "ax", %progbits
@@ -409,6 +429,7 @@ t4_ff8_stppost:
409429
// CHECK-NEXT: 23a000: ad000861 stp q1, q2, [x3]
410430
// CHECK-NEXT: 23a004: 9b107e03 mul x3, x16, x16
411431
// CHECK-FIX: 23a008: 14002829 b 0x2440ac
432+
// CHECK-FIX: <__CortexA53843419_23A008_ret>:
412433
// CHECK-NOFIX: 23a008: f940060e ldr x14, [x16, #8]
413434
// CHECK-NEXT: 23a00c: d65f03c0 ret
414435
.section .text.21, "ax", %progbits
@@ -429,6 +450,7 @@ t4_ffc_stpsimd:
429450
// CHECK-NEXT: 23c000: a8000861 stnp x1, x2, [x3]
430451
// CHECK-NEXT: 23c004: d503201f nop
431452
// CHECK-FIX: 23c008: 1400202b b 0x2440b4
453+
// CHECK-FIX: <__CortexA53843419_23C008_ret>:
432454
// CHECK-NOFIX: 23c008: f94000ea ldr x10, [x7]
433455
// CHECK-NEXT: 23c00c: d65f03c0 ret
434456
.section .text.22, "ax", %progbits
@@ -449,6 +471,7 @@ t4_ffc_stnp:
449471
// CHECK-NEXT: 23e000: 4d008020 st1 { v0.s }[2], [x1]
450472
// CHECK-NEXT: 23e004: f94006f6 ldr x22, [x23, #8]
451473
// CHECK-FIX: 23e008: 1400182d b 0x2440bc
474+
// CHECK-FIX: <__CortexA53843419_23E008_ret>:
452475
// CHECK-NOFIX: 23e008: f93fff18 str x24, [x24, #32760]
453476
// CHECK-NEXT: 23e00c: d65f03c0 ret
454477
.section .text.23, "ax", %progbits
@@ -468,6 +491,7 @@ t4_ffc_st1:
468491
// CHECK-NEXT: 23fff8: b0000100 adrp x0, 0x260000
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// CHECK-NEXT: 23fffc: 4c827020 st1 { v0.16b }, [x1], x2
470493
// CHECK-FIX: 240000: 14001031 b 0x2440c4
494+
// CHECK-FIX: <__CortexA53843419_240000_ret>:
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// CHECK-NOFIX: 240000: f9400801 ldr x1, [x0, #16]
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// CHECK-NEXT: 240004: f9400802 ldr x2, [x0, #16]
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// CHECK-NEXT: 240008: d65f03c0 ret

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