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Pull requests list

[Object] Add getRISCVVendorRelocationTypeName to render RISCV vendor-specific relocations to strings. llvm:binary-utilities
#168293 opened Nov 16, 2025 by resistor Loading…
1
Revert "DAG: Allow select ptr combine for non-0 address spaces" backend:AMDGPU backend:NVPTX llvm:SelectionDAG SelectionDAGISel as well
#168292 opened Nov 16, 2025 by ronlieb Loading…
1
[VPlan] Create header phis once, after constructing VPlan0 (NFC). llvm:transforms vectorizers
#168291 opened Nov 16, 2025 by fhahn Loading…
1
DAG: Use poison for some vector result widening backend:AArch64 backend:PowerPC backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#168290 opened Nov 16, 2025 by arsenm Loading…
3
[VPlan] Remove PtrIV::IsScalarAfterVectorization, use VPlan analysis. llvm:transforms vectorizers
#168289 opened Nov 16, 2025 by fhahn Loading…
3
DAG: Handle poison in m_Undef llvm:SelectionDAG SelectionDAGISel as well
#168288 opened Nov 16, 2025 by arsenm Loading…
2
[ADT] Move initWithExactBucketCount to DenseMapBase (NFC) llvm:adt
#168283 opened Nov 16, 2025 by kazutakahirata Loading…
1
[DAG] Add strictfp implicit def reg after metadata. backend:AArch64 backend:AMDGPU backend:ARM backend:X86 llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well
#168282 opened Nov 16, 2025 by davemgreen Loading…
1
2
[CIR] Lower calls to trivial copy constructor to cir::CopyOp clang Clang issues not falling into any other category ClangIR Anything related to the ClangIR project
#168281 opened Nov 16, 2025 by HendrikHuebner Loading…
4
[lldb][NFC] use llvm::erase_if to remove non matching types lldb
#168279 opened Nov 16, 2025 by da-viper Loading…
1
[lldb] [disassembler] chore: update VariableAnnotator::Annotate to except only Instruction as param and drop module and target lldb
#168276 opened Nov 16, 2025 by n2h9 Loading…
2
[lldb] [scripting bridge] 167388 chore: add api to return arch name for target lldb
#168273 opened Nov 16, 2025 by n2h9 Loading…
1
13
[Hexagon] TableGen-erate SDNode descriptions backend:Hexagon
#168272 opened Nov 16, 2025 by s-barannikov Loading…
2
Update Clang Maintainers clang Clang issues not falling into any other category
#168271 opened Nov 16, 2025 by steakhal Loading…
2
[LV] Use forced cost once for whole interleave group in legacy costmodel llvm:transforms vectorizers
#168270 opened Nov 16, 2025 by fhahn Loading…
2
[VPlan] Skip applying InstsToScalarize with forced instr costs. llvm:transforms vectorizers
#168269 opened Nov 16, 2025 by fhahn Loading…
2
[mlir][emitc] Refactor brackets in expressions mlir:emitc mlir
#168267 opened Nov 16, 2025 by aniragil Loading…
1
[Runtimes] Default build must use its own output dirs cmake Build system in general and CMake in particular compiler-rt:sanitizer compiler-rt offload openmp:libomp OpenMP host runtime openmp:libomptarget OpenMP offload runtime
#168266 opened Nov 16, 2025 by Meinersbur Loading…
3
[ARM] Remove Subtarget from ARMAsmPrinter backend:ARM
#168264 opened Nov 16, 2025 by davemgreen Loading…
2
[CIR] ExtVectorElementExpr with rvalue base clang Clang issues not falling into any other category ClangIR Anything related to the ClangIR project
#168260 opened Nov 16, 2025 by AmrDeveloper Loading…
1
[RegAlloc] Relax the split constrain on MBB prolog backend:AMDGPU backend:X86 llvm:codegen llvm:regalloc
#168259 opened Nov 16, 2025 by LuoYuanke Loading…
1
RFC: [ADT] Use a storage policy in DenseMap/SmallDenseMap (NFC)
#168255 opened Nov 16, 2025 by kazutakahirata • Draft
8
[MLGO] Fully Remove MLRegalloc Development Features llvm:codegen mlgo
#168252 opened Nov 16, 2025 by boomanaiden154 Loading…
1
[LoopPeel] Fix BFI when peeling last iteration without guard llvm:support llvm:transforms
#168250 opened Nov 16, 2025 by jdenny-ornl Loading…
1
[AMDGPU] TableGen-erate SDNode descriptions backend:AMDGPU
#168248 opened Nov 15, 2025 by s-barannikov Loading…
1
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