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Commit a98b076

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Tarcisio Fischer
committed
Avoid targeting mapping symbols on relocations
1 parent b2b82fd commit a98b076

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3 files changed

+25
-18
lines changed

3 files changed

+25
-18
lines changed

lld/ELF/AArch64ErrataFix.cpp

Lines changed: 17 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -370,7 +370,7 @@ static uint64_t scanCortexA53Errata843419(InputSection *isec, uint64_t &off,
370370

371371
class elf::Patch843419Section final : public SyntheticSection {
372372
public:
373-
Patch843419Section(Ctx &, InputSection *p, uint64_t off, Symbol* patcheeCodeSym);
373+
Patch843419Section(Ctx &, InputSection *p, uint64_t off, Defined* patcheeCodeSym);
374374

375375
void writeTo(uint8_t *buf) override;
376376

@@ -390,7 +390,7 @@ class elf::Patch843419Section final : public SyntheticSection {
390390
Symbol *patchSym;
391391
};
392392

393-
Patch843419Section::Patch843419Section(Ctx &ctx, InputSection *p, uint64_t off, Symbol* patcheeCodeSym)
393+
Patch843419Section::Patch843419Section(Ctx &ctx, InputSection *p, uint64_t off, Defined* patcheeCodeSym)
394394
: SyntheticSection(ctx, ".text.patch", SHT_PROGBITS,
395395
SHF_ALLOC | SHF_EXECINSTR, 4),
396396
patchee(p), patcheeOffset(off) {
@@ -399,7 +399,7 @@ Patch843419Section::Patch843419Section(Ctx &ctx, InputSection *p, uint64_t off,
399399
ctx, ctx.saver.save("__CortexA53843419_" + utohexstr(getLDSTAddr())),
400400
STT_FUNC, 0, getSize(), *this);
401401
addSyntheticLocal(ctx, ctx.saver.save("$x"), STT_NOTYPE, 0, 0, *this);
402-
int64_t retToPatcheeSymOffset = (getLDSTAddr() - p->getVA(dyn_cast<Defined>(patcheeCodeSym)->value)) + 4;
402+
int64_t retToPatcheeSymOffset = (getLDSTAddr() - p->getVA(patcheeCodeSym->value)) + 4;
403403
addReloc({R_PC, R_AARCH64_JUMP26, 4, retToPatcheeSymOffset, patcheeCodeSym});
404404
}
405405

@@ -440,19 +440,22 @@ void AArch64Err843419Patcher::init() {
440440
auto *def = dyn_cast<Defined>(b);
441441
if (!def)
442442
continue;
443-
if (!isCodeMapSymbol(def) && !isDataMapSymbol(def))
443+
if (!def->isSection() && !isCodeMapSymbol(def) && !isDataMapSymbol(def))
444444
continue;
445-
if (auto *sec = dyn_cast_or_null<InputSection>(def->section))
446-
if (sec->flags & SHF_EXECINSTR)
447-
sectionMap[sec].push_back(def);
445+
if (auto *sec = dyn_cast_or_null<InputSection>(def->section)) {
446+
if (def->isSection())
447+
sectionMap[sec].first = def;
448+
else if (sec->flags & SHF_EXECINSTR)
449+
sectionMap[sec].second.push_back(def);
450+
}
448451
}
449452
}
450453
// For each InputSection make sure the mapping symbols are in sorted in
451454
// ascending order and free from consecutive runs of mapping symbols with
452455
// the same type. For example we must remove the redundant $d.1 from $x.0
453456
// $d.0 $d.1 $x.1.
454457
for (auto &kv : sectionMap) {
455-
std::vector<Defined *> &mapSyms = kv.second;
458+
std::vector<Defined *> &mapSyms = kv.second.second;
456459
llvm::stable_sort(mapSyms, [](const Defined *a, const Defined *b) {
457460
return a->value < b->value;
458461
});
@@ -527,7 +530,7 @@ void AArch64Err843419Patcher::insertPatches(
527530
static void implementPatch(Ctx &ctx, uint64_t adrpAddr, uint64_t patcheeOffset,
528531
InputSection *isec,
529532
std::vector<Patch843419Section *> &patches,
530-
Symbol* patcheeCodeSym) {
533+
Defined* patcheeCodeSym) {
531534
// There may be a relocation at the same offset that we are patching. There
532535
// are four cases that we need to consider.
533536
// Case 1: R_AARCH64_JUMP26 branch relocation. We have already patched this
@@ -582,7 +585,10 @@ AArch64Err843419Patcher::patchInputSectionDescription(
582585
// mapping symbols of the same type. Our range of executable instructions to
583586
// scan is therefore [codeSym->value, dataSym->value) or [codeSym->value,
584587
// section size).
585-
std::vector<Defined *> &mapSyms = sectionMap[isec];
588+
auto &[sectionSym, mapSyms] = sectionMap[isec];
589+
if (sectionSym == nullptr)
590+
sectionSym = addSyntheticLocal(ctx, "", STT_SECTION, 0, 0, *isec);
591+
586592

587593
auto codeSym = mapSyms.begin();
588594
while (codeSym != mapSyms.end()) {
@@ -595,7 +601,7 @@ AArch64Err843419Patcher::patchInputSectionDescription(
595601
uint64_t startAddr = isec->getVA(off);
596602
if (uint64_t patcheeOffset =
597603
scanCortexA53Errata843419(isec, off, limit))
598-
implementPatch(ctx, startAddr, patcheeOffset, isec, patches, dyn_cast<Symbol>(*codeSym));
604+
implementPatch(ctx, startAddr, patcheeOffset, isec, patches, sectionSym);
599605
}
600606
if (dataSym == mapSyms.end())
601607
break;

lld/ELF/AArch64ErrataFix.h

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -36,10 +36,11 @@ class AArch64Err843419Patcher {
3636
void init();
3737

3838
Ctx &ctx;
39-
// A cache of the mapping symbols defined by the InputSection sorted in order
40-
// of ascending value with redundant symbols removed. These describe
41-
// the ranges of code and data in an executable InputSection.
42-
llvm::DenseMap<InputSection *, std::vector<Defined *>> sectionMap;
39+
// A cache mapping InputSections to pairs of section symbols (first) and
40+
// the mapping symbols (second) defined by the InputSection sorted in order
41+
// of ascending value with redundant symbols removed. These describe the
42+
// ranges of code and data in an executable InputSection.
43+
llvm::DenseMap<InputSection *, std::pair<Defined*, std::vector<Defined *>>> sectionMap;
4344

4445
bool initialized = false;
4546
};

lld/test/ELF/aarch64-cortex-a53-843419-thunk-relocation-crash.s

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,7 @@ dat: .quad 0
6969
// CHECK-NEXT: br x16
7070
// CHECK-NEXT: 8010028: 34 10 01 10 .word 0x10011034
7171

72-
// CHECK: <__AArch64BTIThunk_$x>:
72+
// CHECK: <__AArch64BTIThunk_>:
7373
// CHECK-NEXT: 8010030: bti c
7474
// CHECK-NEXT: b 0x8011028 <far_away_no_bti+0xff0>
7575

@@ -84,14 +84,14 @@ dat: .quad 0
8484
// Check that the errata thunk does NOT contain a landing pad
8585
// CHECK: <__CortexA53843419_8011004>:
8686
// CHECK-NEXT: 1001102c: ldr x0, [x0, #64]
87-
// CHECK-NEXT: b 0x10011040 <__AArch64AbsLongThunk_$x>
87+
// CHECK-NEXT: b 0x10011040 <__AArch64AbsLongThunk_>
8888

8989
// Rest of generated code for readability
9090
// CHECK: <__AArch64BTIThunk___CortexA53843419_8011004>:
9191
// CHECK-NEXT: 10011034: bti c
9292
// CHECK-NEXT: b 0x1001102c <__CortexA53843419_8011004>
9393

94-
// CHECK: <__AArch64AbsLongThunk_$x>
94+
// CHECK: <__AArch64AbsLongThunk_>
9595
// CHECK-NEXT: 10011040: ldr x16, 0x10011048
9696
// CHECK-NEXT: br x16
9797
// CHECK-NEXT: 10011048: 30 00 01 08 .word 0x08010030

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