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Update README.md #2368

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2 changes: 1 addition & 1 deletion examples/sw/benchmarks/README.md
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Expand Up @@ -19,7 +19,7 @@ It is one of several pre-defined ibex configurations, others can be used.
These are specified in the `ibex_configs.yaml` file.

You can also test how the instruction cache affects performance.
To see this effect you must specify a delay on the instruction accesses becaus with single-cycle RAM access an isntruction cache does not help.
To see this effect you must specify a delay on the instruction accesses because with single-cycle RAM access an isntruction cache does not help.
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@nasahlpa nasahlpa Feb 6, 2026

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To see this effect you must specify a delay on the instruction accesses because with single-cycle RAM access an isntruction cache does not help.
To see this effect you must specify a delay on the instruction accesses because with single-cycle RAM access an instruction cache does not help.


```shell
fusesoc --cores-root=. run --target=sim --setup --build lowrisc:ibex:ibex_simple_system `./util/ibex_config.py maxperf-pmp-bmfull-icache fusesoc_opts` --INSTR_CYCLE_DELAY=5
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