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feat(ista): improve SDC clock constraints and SDF timing output - #171

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ZhishengZeng merged 24 commits into
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sta_timing_main
Aug 22, 2026
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feat(ista): improve SDC clock constraints and SDF timing output#171
ZhishengZeng merged 24 commits into
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sta_timing_main

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Wenz-jam and others added 24 commits August 5, 2026 11:49
…expression

Use C++17 fold expression to simplify pushStream, and cast to void
to suppress unused-value warnings.
…eal/propagated multi-clock trees.

Add create_clock and set_propagated_clock support, together with update_timing, write_sdf, report_timing, and remove_wire_load_model Tcl commands. Split STA initialization from timing propagation and support ideal and propagated multi-clock trees.
ista: 支持 create_clock, 支持propagated/idea clock
(cherry picked from commit 9379e80628e04f0025d00a54c17bbd114908476c)
fix(ista): 修复TimingPropagator疯狂吃内存的问题
…a_main

# Conflicts:
#	src/operation/iSTA/source/module/timing_analyzer/TimingAnalyzer.hpp
feat(ista): use Tcl engine as SDC command engine
fix(ista): ista now support set_propagated_clock in sdc
related issue #164
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ZhishengZeng requested a review from yipeix August 22, 2026 00:24
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ZhishengZeng enabled auto-merge (squash) August 22, 2026 00:24
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ZhishengZeng requested a review from Emin017 August 22, 2026 00:25
@ZhishengZeng ZhishengZeng changed the title Sta timing main feat(ista): improve SDC clock constraints and SDF timing output Aug 22, 2026
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ZhishengZeng merged commit 3947a64 into main Aug 22, 2026
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5 participants