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RadxaYuntianRadxaYuntian
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Merge pull request #284 from CodeChenL/main
fix: all rk3568 overlays are replaced with reference syntax
2 parents 4be684e + 25270a5 commit 0224866

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‎arch/arm64/boot/dts/rockchip/overlays/rk3568-can0-m0.dts‎

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -11,17 +11,13 @@
1111
exclusive = "GPIO0_B4", "GPIO0_B3";
1212
description = "Enable CAN1-M0.\nOn Radxa ROCK 3A >= v1.3 this is RX pin 27 & TX pin 28.\nOn Radxa ROCK 3B this is RX pin 27 & TX pin 28.";
1313
};
14+
};
1415

15-
fragment@0 {
16-
target = <&can0>;
17-
18-
__overlay__ {
19-
status = "okay";
20-
compatible = "rockchip,can-1.0";
21-
assigned-clocks = <&cru CLK_CAN0>;
22-
assigned-clock-rates = <200000000>;
23-
pinctrl-names = "default";
24-
pinctrl-0 = <&can0m0_pins>;
25-
};
26-
};
16+
&can0 {
17+
status = "okay";
18+
compatible = "rockchip,can-1.0";
19+
assigned-clocks = <&cru CLK_CAN0>;
20+
assigned-clock-rates = <200000000>;
21+
pinctrl-names = "default";
22+
pinctrl-0 = <&can0m0_pins>;
2723
};

‎arch/arm64/boot/dts/rockchip/overlays/rk3568-can1-m0.dts‎

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -11,17 +11,13 @@
1111
exclusive = "GPIO1_A0", "GPIO1_A1";
1212
description = "Enable CAN1-M0.\nOn Radxa ROCK 3A <= v1.2 this is RX pin 3 & TX pin 5.\nOn Radxa ROCK 3A >= v1.3 this is RX pin 3 & TX pin 5.\nOn Radxa ROCK 3B this is RX pin 3 & TX pin 5.\nOn Radxa E25 this is RX pin 3 & TX pin 5";
1313
};
14+
};
1415

15-
fragment@0 {
16-
target = <&can1>;
17-
18-
__overlay__ {
19-
status = "okay";
20-
compatible = "rockchip,can-1.0";
21-
assigned-clocks = <&cru CLK_CAN1>;
22-
assigned-clock-rates = <200000000>;
23-
pinctrl-names = "default";
24-
pinctrl-0 = <&can1m0_pins>;
25-
};
26-
};
16+
&can1 {
17+
status = "okay";
18+
compatible = "rockchip,can-1.0";
19+
assigned-clocks = <&cru CLK_CAN1>;
20+
assigned-clock-rates = <200000000>;
21+
pinctrl-names = "default";
22+
pinctrl-0 = <&can1m0_pins>;
2723
};

‎arch/arm64/boot/dts/rockchip/overlays/rk3568-can1-m1.dts‎

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -11,17 +11,13 @@
1111
exclusive = "GPIO4_C3", "GPIO4_C2";
1212
description = "Enable CAN1-M1.\nOn Radxa ROCK 3A <= v1.2 this is RX pin 23 & TX pin 19.\nOn Radxa ROCK 3A >= v1.3 this is RX pin 23 & TX pin 19.\nOn Radxa ROCK 3B this is TX pin 19 & RX pin 23.";
1313
};
14+
};
1415

15-
fragment@0 {
16-
target = <&can1>;
17-
18-
__overlay__ {
19-
status = "okay";
20-
compatible = "rockchip,can-1.0";
21-
assigned-clocks = <&cru CLK_CAN1>;
22-
assigned-clock-rates = <200000000>;
23-
pinctrl-names = "default";
24-
pinctrl-0 = <&can1m1_pins>;
25-
};
26-
};
16+
&can1 {
17+
status = "okay";
18+
compatible = "rockchip,can-1.0";
19+
assigned-clocks = <&cru CLK_CAN1>;
20+
assigned-clock-rates = <200000000>;
21+
pinctrl-names = "default";
22+
pinctrl-0 = <&can1m1_pins>;
2723
};

‎arch/arm64/boot/dts/rockchip/overlays/rk3568-disable-fiq-debugger.dts‎

Lines changed: 14 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -11,31 +11,23 @@
1111
exclusive = "GPIO0_D0", "GPIO0_D1", "fiq_debugger";
1212
description = "Disable FIQ Debugger.";
1313
};
14+
};
1415

15-
fragment@0 {
16-
target = <&fiq_debugger>;
17-
18-
__overlay__ {
19-
status = "disabled";
20-
};
21-
};
22-
23-
fragment@1 {
24-
target = <&pinctrl>;
16+
&fiq_debugger {
17+
status = "disabled";
18+
};
2519

26-
__overlay__ {
27-
pinctrl-0 = <&gpio0_d0_d1>;
28-
pinctrl-names = "default";
20+
&pinctrl {
21+
pinctrl-0 = <&gpio0_d0_d1>;
22+
pinctrl-names = "default";
2923

30-
gpio_func {
31-
gpio0_d0_d1: gpio0-d0-d1 {
32-
rockchip,pins =
33-
/* GPIO0_D0 */
34-
<0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,
35-
/* GPIO0_D1 */
36-
<0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
37-
};
38-
};
24+
gpio_func {
25+
gpio0_d0_d1: gpio0-d0-d1 {
26+
rockchip,pins =
27+
/* GPIO0_D0 */
28+
<0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,
29+
/* GPIO0_D1 */
30+
<0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
3931
};
4032
};
4133
};

‎arch/arm64/boot/dts/rockchip/overlays/rk3568-dwc3-host.dts‎

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -10,13 +10,9 @@
1010
exclusive = "usbdrd_dwc3-dr_mode";
1111
description = "Set OTG port to Host mode.\nUse this when you want to connect USB devices.";
1212
};
13+
};
1314

14-
fragment@0 {
15-
target = <&usbdrd_dwc3>;
16-
17-
__overlay__ {
18-
status = "okay";
19-
dr_mode = "host";
20-
};
21-
};
15+
&usbdrd_dwc3 {
16+
status = "okay";
17+
dr_mode = "host";
2218
};

‎arch/arm64/boot/dts/rockchip/overlays/rk3568-dwc3-otg.dts‎

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -10,13 +10,9 @@
1010
exclusive = "usbdrd_dwc3-dr_mode";
1111
description = "Set OTG port to be controlled by hardware switch.";
1212
};
13+
};
1314

14-
fragment@0 {
15-
target = <&usbdrd_dwc3>;
16-
17-
__overlay__ {
18-
status = "okay";
19-
dr_mode = "otg";
20-
};
21-
};
15+
&usbdrd_dwc3 {
16+
status = "okay";
17+
dr_mode = "otg";
2218
};

‎arch/arm64/boot/dts/rockchip/overlays/rk3568-dwc3-peripheral.dts‎

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -10,13 +10,9 @@
1010
exclusive = "usbdrd_dwc3-dr_mode";
1111
description = "Set OTG port to Peripheral mode.Use this when you want to connect to another computer.";
1212
};
13+
};
1314

14-
fragment@0 {
15-
target = <&usbdrd_dwc3>;
16-
17-
__overlay__ {
18-
status = "okay";
19-
dr_mode = "peripheral";
20-
};
21-
};
15+
&usbdrd_dwc3 {
16+
status = "okay";
17+
dr_mode = "peripheral";
2218
};

‎arch/arm64/boot/dts/rockchip/overlays/rk3568-fiq-debugger-uart0.dts‎

Lines changed: 9 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -8,23 +8,16 @@
88
category = "misc";
99
description = "Enable FIQ Debugger on UART0.\nOn Radxa ROCK 3B this is TX pin 22 & RX pin 15.";
1010
};
11+
};
1112

12-
fragment@0 {
13-
target = <&fiq_debugger>;
14-
15-
__overlay__ {
16-
status = "okay";
17-
rockchip,serial-id = <0>;
18-
pinctrl-names = "default";
19-
pinctrl-0 = <&uart0_xfer>;
20-
};
21-
};
2213

23-
fragment@1 {
24-
target = <&uart0>;
14+
&fiq_debugger {
15+
status = "okay";
16+
rockchip,serial-id = <0>;
17+
pinctrl-names = "default";
18+
pinctrl-0 = <&uart0_xfer>;
19+
};
2520

26-
__overlay__ {
27-
status = "disabled";
28-
};
29-
};
21+
&uart0 {
22+
status = "disabled";
3023
};

‎arch/arm64/boot/dts/rockchip/overlays/rk3568-fiq-debugger-uart2m0.dts‎

Lines changed: 9 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -9,23 +9,15 @@
99
exclusive = "GPIO0_D1", "GPIO0_D0";
1010
description = "Enable FIQ Debugger on UART2-M0.";
1111
};
12+
};
1213

13-
fragment@0 {
14-
target = <&fiq_debugger>;
15-
16-
__overlay__ {
17-
status = "okay";
18-
rockchip,serial-id = <2>;
19-
pinctrl-names = "default";
20-
pinctrl-0 = <&uart2m0_xfer>;
21-
};
22-
};
23-
24-
fragment@1 {
25-
target = <&uart2>;
14+
&fiq_debugger {
15+
status = "okay";
16+
rockchip,serial-id = <2>;
17+
pinctrl-names = "default";
18+
pinctrl-0 = <&uart2m0_xfer>;
19+
};
2620

27-
__overlay__ {
28-
status = "disabled";
29-
};
30-
};
21+
&uart2 {
22+
status = "disabled";
3123
};

‎arch/arm64/boot/dts/rockchip/overlays/rk3568-fiq-debugger-uart3m0.dts‎

Lines changed: 9 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -9,23 +9,15 @@
99
exclusive = "GPIO1_A0", "GPIO1_A1";
1010
description = "Enable FIQ Debugger on UART3-M0.\nOn Radxa ROCK 3B this is RX pin 3 & TX pin 5.\nOn Radxa ROCK 3C this is RX pin 3 & TX pin 5.\nOn Radxa E25 this is RX pin 3 & TX pin 5.";
1111
};
12+
};
1213

13-
fragment@0 {
14-
target = <&fiq_debugger>;
15-
16-
__overlay__ {
17-
status = "okay";
18-
rockchip,serial-id = <3>;
19-
pinctrl-names = "default";
20-
pinctrl-0 = <&uart3m0_xfer>;
21-
};
22-
};
23-
24-
fragment@1 {
25-
target = <&uart3>;
14+
&fiq_debugger {
15+
status = "okay";
16+
rockchip,serial-id = <3>;
17+
pinctrl-names = "default";
18+
pinctrl-0 = <&uart3m0_xfer>;
19+
};
2620

27-
__overlay__ {
28-
status = "disabled";
29-
};
30-
};
21+
&uart3 {
22+
status = "disabled";
3123
};

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