rust-embedded · sriramster · Jul 29, 2026 · Jul 29, 2026 · Jul 29, 2026 · Jul 29, 2026
diff --git a/Cargo.toml b/Cargo.toml
@@ -11,5 +11,6 @@ members = [
   "aarch32-cpu",
   "aarch32-rt",
   "aarch32-rt-macros",
+  "aarch32-tests",
 ]
 resolver = "2"
diff --git a/aarch32-tests/Cargo.toml b/aarch32-tests/Cargo.toml
@@ -0,0 +1,15 @@
+[package]
+name = "aarch32-tests"
+version = "0.4.0"
+edition = "2024"
+publish = false
+description = "Qemu and insta based test suite"
+
+[[test]]
+name = "tests"
+harness = false
+
+[dev-dependencies]
+insta = { version = "1", features = ["filters"] }
+serde_json = "1"
+libtest-mimic = "0.8"
diff --git a/aarch32-tests/tests/common/mod.rs b/aarch32-tests/tests/common/mod.rs
@@ -0,0 +1,68 @@
+pub(crate) mod test_utils {
+    use std::path::{Path, PathBuf};
+    use std::process::Command;
+
+    /// `aarch32-tests/` -> repo root -> `<name>` (e.g. "examples/versatileab").
+    pub fn test_dir(name: &str) -> PathBuf {
+        PathBuf::from(env!("CARGO_MANIFEST_DIR"))
+            .parent()
+            .unwrap()
+            .join(name)
+    }
+
+    pub fn discover_bins(dir: &Path) -> Vec<String> {
+        let output = Command::new("cargo")
+            .current_dir(dir)
+            .args(["metadata", "--format-version=1", "--no-deps"])
+            .output()
+            .expect("failed to run cargo metadata");
+        assert!(
+            output.status.success(),
+            "cargo metadata failed: {}",
+            String::from_utf8_lossy(&output.stderr)
+        );
+
+        let meta: serde_json::Value =
+            serde_json::from_slice(&output.stdout).expect("cargo metadata produced invalid JSON");
+
+        let mut bins: Vec<String> = meta["packages"]
+            .as_array()
+            .into_iter()
+            .flatten()
+            .flat_map(|pkg| pkg["targets"].as_array().into_iter().flatten())
+            .filter(|target| {
+                target["kind"]
+                    .as_array()
+                    .is_some_and(|kinds| kinds.iter().any(|k| k.as_str() == Some("bin")))
+            })
+            .filter_map(|target| target["name"].as_str().map(String::from))
+            .collect();
+        bins.sort();
+        bins
+    }
+
+    pub fn run_bin(
+        dir: &Path,
+        bin: &str,
+        target: &str,
+        flags: &[&str],
+        rustflags: Option<&str>,
+    ) -> String {
+        let mut cmd = Command::new("cargo");
+        cmd.current_dir(dir)
+            .arg("run")
+            .arg(format!("--target={target}"))
+            .args(flags)
+            .args(["--bin", bin]);
+
+        // Some variants (e.g. fpu-d32) need a target-feature/-cpu; pass it only to
+        // this cross build, never to the host test binary.
+        if let Some(rustflags) = rustflags {
+            cmd.env("RUSTFLAGS", rustflags);
+        }
+
+        let output = cmd.output().expect("failed to execute cargo run");
+
+        String::from_utf8_lossy(&output.stdout).into_owned()
+    }
+}
diff --git a/.../abt-exception-a32-armv8r-none-eabihf.out → ...abt-exception-a32-armv8r-none-eabihf.snap b/.../abt-exception-a32-armv8r-none-eabihf.out → ...abt-exception-a32-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is an data abort exception example
 data abort occurred Hsr { ec: Ok(DataAbortFromCurrent), il: ThirtyTwoBit, iss: 33 } Some(DataAbortFromCurrent(IssDataAbort { isv: false, sas: 0, sae: false, srt: 0, ar: false, fnv: false, ea: false, cm: false, wnr: false, dfsc: 21 }))
 caught unaligned_from_a32

diff --git a/...bt-exception-a32-thumbv8r-none-eabihf.out → ...t-exception-a32-thumbv8r-none-eabihf.snap b/...bt-exception-a32-thumbv8r-none-eabihf.out → ...t-exception-a32-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is an data abort exception example
 data abort occurred Hsr { ec: Ok(DataAbortFromCurrent), il: ThirtyTwoBit, iss: 33 } Some(DataAbortFromCurrent(IssDataAbort { isv: false, sas: 0, sae: false, srt: 0, ar: false, fnv: false, ea: false, cm: false, wnr: false, dfsc: 21 }))
 caught unaligned_from_a32

diff --git a/.../abt-exception-t32-armv8r-none-eabihf.out → ...abt-exception-t32-armv8r-none-eabihf.snap b/.../abt-exception-t32-armv8r-none-eabihf.out → ...abt-exception-t32-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is an data abort exception example
 data abort occurred Hsr { ec: Ok(DataAbortFromCurrent), il: ThirtyTwoBit, iss: 33 } Some(DataAbortFromCurrent(IssDataAbort { isv: false, sas: 0, sae: false, srt: 0, ar: false, fnv: false, ea: false, cm: false, wnr: false, dfsc: 21 }))
 caught unaligned_from_t32

diff --git a/...bt-exception-t32-thumbv8r-none-eabihf.out → ...t-exception-t32-thumbv8r-none-eabihf.snap b/...bt-exception-t32-thumbv8r-none-eabihf.out → ...t-exception-t32-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is an data abort exception example
 data abort occurred Hsr { ec: Ok(DataAbortFromCurrent), il: ThirtyTwoBit, iss: 33 } Some(DataAbortFromCurrent(IssDataAbort { isv: false, sas: 0, sae: false, srt: 0, ar: false, fnv: false, ea: false, cm: false, wnr: false, dfsc: 21 }))
 caught unaligned_from_t32

diff --git a/...ence/generic-timer-armv8r-none-eabihf.out → ...el2/generic-timer-armv8r-none-eabihf.snap b/...ence/generic-timer-armv8r-none-eabihf.out → ...el2/generic-timer-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Found PERIPHBASE 0xf0000000
 Creating GIC driver @ 0xf0000000 / 0xf0100000
 Calling git.setup(0)

diff --git a/...ce/generic-timer-thumbv8r-none-eabihf.out → ...2/generic-timer-thumbv8r-none-eabihf.snap b/...ce/generic-timer-thumbv8r-none-eabihf.out → ...2/generic-timer-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Found PERIPHBASE 0xf0000000
 Creating GIC driver @ 0xf0000000 / 0xf0100000
 Calling git.setup(0)

diff --git a/...ce/gic-unified-irq-armv8r-none-eabihf.out → ...2/gic-unified-irq-armv8r-none-eabihf.snap b/...ce/gic-unified-irq-armv8r-none-eabihf.out → ...2/gic-unified-irq-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Found PERIPHBASE 0xf0000000
 Creating GIC driver @ 0xf0000000 / 0xf0100000
 Calling git.setup(0)

diff --git a/.../gic-unified-irq-thumbv8r-none-eabihf.out → ...gic-unified-irq-thumbv8r-none-eabihf.snap b/.../gic-unified-irq-thumbv8r-none-eabihf.out → ...gic-unified-irq-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Found PERIPHBASE 0xf0000000
 Creating GIC driver @ 0xf0000000 / 0xf0100000
 Calling git.setup(0)

diff --git a/...l2/reference/hello-armv8r-none-eabihf.out → ...3-an536-el2/hello-armv8r-none-eabihf.snap b/...l2/reference/hello-armv8r-none-eabihf.out → ...3-an536-el2/hello-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is semihosting! x = 1.000, y = 2.000
 SCTLR { IE=0 TE=0 NMFI=0 EE=0 U=1 FI=0 DZ=1 BR=0 RR=0 V=0 I=0 Z=1 SW=0 C=0 A=0 M=0 }
 CPSR { N=0 Z=1 C=1 V=0 Q=0 J=0 E=0 A=1 I=1 F=1 T=0 MODE=Ok(Hyp) }

diff --git a/.../reference/hello-thumbv8r-none-eabihf.out → ...an536-el2/hello-thumbv8r-none-eabihf.snap b/.../reference/hello-thumbv8r-none-eabihf.out → ...an536-el2/hello-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is semihosting! x = 1.000, y = 2.000
 SCTLR { IE=0 TE=0 NMFI=0 EE=0 U=1 FI=0 DZ=1 BR=0 RR=0 V=0 I=0 Z=1 SW=0 C=0 A=0 M=0 }
 CPSR { N=0 Z=1 C=1 V=0 Q=0 J=0 E=0 A=1 I=1 F=1 T=0 MODE=Ok(Hyp) }

diff --git a/.../reference/hvc-a32-armv8r-none-eabihf.out → ...an536-el2/hvc-a32-armv8r-none-eabihf.snap b/.../reference/hvc-a32-armv8r-none-eabihf.out → ...an536-el2/hvc-a32-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 x = 1, y = 2, z = 3.000
 In hvc_handler, with Hsr { ec: Ok(Hvc), il: ThirtyTwoBit, iss: 0000abcd }, Some(Hvc(IssCall { imm16: abcd })), Frame { r0: 10000000, r1: 10000001, r2: 10000002, r3: 10000003, r4: 10000004, r5: 10000005 }
 In hvc_handler, with Hsr { ec: Ok(Hvc), il: ThirtyTwoBit, iss: 00009876 }, Some(Hvc(IssCall { imm16: 9876 })), Frame { r0: 20000000, r1: 20000001, r2: 20000002, r3: 20000003, r4: 20000004, r5: 20000005 }

diff --git a/...eference/hvc-a32-thumbv8r-none-eabihf.out → ...536-el2/hvc-a32-thumbv8r-none-eabihf.snap b/...eference/hvc-a32-thumbv8r-none-eabihf.out → ...536-el2/hvc-a32-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 x = 1, y = 2, z = 3.000
 In hvc_handler, with Hsr { ec: Ok(Hvc), il: ThirtyTwoBit, iss: 0000abcd }, Some(Hvc(IssCall { imm16: abcd })), Frame { r0: 10000000, r1: 10000001, r2: 10000002, r3: 10000003, r4: 10000004, r5: 10000005 }
 In hvc_handler, with Hsr { ec: Ok(Hvc), il: ThirtyTwoBit, iss: 00009876 }, Some(Hvc(IssCall { imm16: 9876 })), Frame { r0: 20000000, r1: 20000001, r2: 20000002, r3: 20000003, r4: 20000004, r5: 20000005 }

diff --git a/.../reference/hvc-t32-armv8r-none-eabihf.out → ...an536-el2/hvc-t32-armv8r-none-eabihf.snap b/.../reference/hvc-t32-armv8r-none-eabihf.out → ...an536-el2/hvc-t32-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 x = 1, y = 2, z = 3.000
 In hvc_handler, with Hsr { ec: Ok(Hvc), il: ThirtyTwoBit, iss: 0000abcd }, Some(Hvc(IssCall { imm16: abcd })), Frame { r0: 10000000, r1: 10000001, r2: 10000002, r3: 10000003, r4: 10000004, r5: 10000005 }
 In hvc_handler, with Hsr { ec: Ok(Hvc), il: ThirtyTwoBit, iss: 00009876 }, Some(Hvc(IssCall { imm16: 9876 })), Frame { r0: 20000000, r1: 20000001, r2: 20000002, r3: 20000003, r4: 20000004, r5: 20000005 }

diff --git a/...eference/hvc-t32-thumbv8r-none-eabihf.out → ...536-el2/hvc-t32-thumbv8r-none-eabihf.snap b/...eference/hvc-t32-thumbv8r-none-eabihf.out → ...536-el2/hvc-t32-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 x = 1, y = 2, z = 3.000
 In hvc_handler, with Hsr { ec: Ok(Hvc), il: ThirtyTwoBit, iss: 0000abcd }, Some(Hvc(IssCall { imm16: abcd })), Frame { r0: 10000000, r1: 10000001, r2: 10000002, r3: 10000003, r4: 10000004, r5: 10000005 }
 In hvc_handler, with Hsr { ec: Ok(Hvc), il: ThirtyTwoBit, iss: 00009876 }, Some(Hvc(IssCall { imm16: 9876 })), Frame { r0: 20000000, r1: 20000001, r2: 20000002, r3: 20000003, r4: 20000004, r5: 20000005 }

diff --git a/...etch-exception-a32-armv8r-none-eabihf.out → ...tch-exception-a32-armv8r-none-eabihf.snap b/...etch-exception-a32-armv8r-none-eabihf.out → ...tch-exception-a32-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is a prefetch abort exception example
 prefetch abort occurred Hsr { ec: Ok(PrefetchAbortFromCurrent), il: ThirtyTwoBit, iss: 00000022 }, Some(PrefetchAbortFromCurrent(IssPrefetchAbort { fnv: false, ea: false, ifsc: 22 }))
 caught bkpt_from_a32

diff --git a/...ch-exception-a32-thumbv8r-none-eabihf.out → ...h-exception-a32-thumbv8r-none-eabihf.snap b/...ch-exception-a32-thumbv8r-none-eabihf.out → ...h-exception-a32-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is a prefetch abort exception example
 prefetch abort occurred Hsr { ec: Ok(PrefetchAbortFromCurrent), il: ThirtyTwoBit, iss: 00000022 }, Some(PrefetchAbortFromCurrent(IssPrefetchAbort { fnv: false, ea: false, ifsc: 22 }))
 caught bkpt_from_a32

diff --git a/...etch-exception-t32-armv8r-none-eabihf.out → ...tch-exception-t32-armv8r-none-eabihf.snap b/...etch-exception-t32-armv8r-none-eabihf.out → ...tch-exception-t32-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is a prefetch abort exception example
 prefetch abort occurred Hsr { ec: Ok(PrefetchAbortFromCurrent), il: ThirtyTwoBit, iss: 00000022 }, Some(PrefetchAbortFromCurrent(IssPrefetchAbort { fnv: false, ea: false, ifsc: 22 }))
 caught bkpt_from_t32

diff --git a/...ch-exception-t32-thumbv8r-none-eabihf.out → ...h-exception-t32-thumbv8r-none-eabihf.snap b/...ch-exception-t32-thumbv8r-none-eabihf.out → ...h-exception-t32-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is a prefetch abort exception example
 prefetch abort occurred Hsr { ec: Ok(PrefetchAbortFromCurrent), il: ThirtyTwoBit, iss: 00000022 }, Some(PrefetchAbortFromCurrent(IssPrefetchAbort { fnv: false, ea: false, ifsc: 22 }))
 caught bkpt_from_t32

diff --git a/.../reference/svc-a32-armv8r-none-eabihf.out → ...an536-el2/svc-a32-armv8r-none-eabihf.snap b/.../reference/svc-a32-armv8r-none-eabihf.out → ...an536-el2/svc-a32-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 x = 1, y = 2, z = 3.000
 In hvc_handler, with Hsr { ec: Ok(Svc), il: ThirtyTwoBit, iss: 0000abcd }, Some(Svc(IssCall { imm16: abcd })), Frame { r0: 10000000, r1: 10000001, r2: 10000002, r3: 10000003, r4: 10000004, r5: 10000005 }
 In hvc_handler, with Hsr { ec: Ok(Svc), il: ThirtyTwoBit, iss: 00009876 }, Some(Svc(IssCall { imm16: 9876 })), Frame { r0: 20000000, r1: 20000001, r2: 20000002, r3: 20000003, r4: 20000004, r5: 20000005 }

diff --git a/...eference/svc-a32-thumbv8r-none-eabihf.out → ...536-el2/svc-a32-thumbv8r-none-eabihf.snap b/...eference/svc-a32-thumbv8r-none-eabihf.out → ...536-el2/svc-a32-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 x = 1, y = 2, z = 3.000
 In hvc_handler, with Hsr { ec: Ok(Svc), il: ThirtyTwoBit, iss: 0000abcd }, Some(Svc(IssCall { imm16: abcd })), Frame { r0: 10000000, r1: 10000001, r2: 10000002, r3: 10000003, r4: 10000004, r5: 10000005 }
 In hvc_handler, with Hsr { ec: Ok(Svc), il: ThirtyTwoBit, iss: 00009876 }, Some(Svc(IssCall { imm16: 9876 })), Frame { r0: 20000000, r1: 20000001, r2: 20000002, r3: 20000003, r4: 20000004, r5: 20000005 }

diff --git a/.../reference/svc-t32-armv8r-none-eabihf.out → ...an536-el2/svc-t32-armv8r-none-eabihf.snap b/.../reference/svc-t32-armv8r-none-eabihf.out → ...an536-el2/svc-t32-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 x = 1, y = 2, z = 3.000
 In hvc_handler, with Hsr { ec: Ok(Svc), il: SixteenBit, iss: 00000012 }, Some(Svc(IssCall { imm16: 12 })), Frame { r0: 10000000, r1: 10000001, r2: 10000002, r3: 10000003, r4: 10000004, r5: 10000005 }
 In hvc_handler, with Hsr { ec: Ok(Svc), il: SixteenBit, iss: 00000032 }, Some(Svc(IssCall { imm16: 32 })), Frame { r0: 20000000, r1: 20000001, r2: 20000002, r3: 20000003, r4: 20000004, r5: 20000005 }

diff --git a/...eference/svc-t32-thumbv8r-none-eabihf.out → ...536-el2/svc-t32-thumbv8r-none-eabihf.snap b/...eference/svc-t32-thumbv8r-none-eabihf.out → ...536-el2/svc-t32-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 x = 1, y = 2, z = 3.000
 In hvc_handler, with Hsr { ec: Ok(Svc), il: SixteenBit, iss: 00000012 }, Some(Svc(IssCall { imm16: 12 })), Frame { r0: 10000000, r1: 10000001, r2: 10000002, r3: 10000003, r4: 10000004, r5: 10000005 }
 In hvc_handler, with Hsr { ec: Ok(Svc), il: SixteenBit, iss: 00000032 }, Some(Svc(IssCall { imm16: 32 })), Frame { r0: 20000000, r1: 20000001, r2: 20000002, r3: 20000003, r4: 20000004, r5: 20000005 }

diff --git a/...ndef-exception-a32-armv8r-none-eabihf.out → ...def-exception-a32-armv8r-none-eabihf.snap b/...ndef-exception-a32-armv8r-none-eabihf.out → ...def-exception-a32-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is a undef exception example
 undefined abort occurred Hsr { ec: Ok(Unknown), il: ThirtyTwoBit, iss: 00000000 }, Some(Unknown(IssUnknown(0)))
 caught udf_from_a32

diff --git a/...ef-exception-a32-thumbv8r-none-eabihf.out → ...f-exception-a32-thumbv8r-none-eabihf.snap b/...ef-exception-a32-thumbv8r-none-eabihf.out → ...f-exception-a32-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is a undef exception example
 undefined abort occurred Hsr { ec: Ok(Unknown), il: ThirtyTwoBit, iss: 00000000 }, Some(Unknown(IssUnknown(0)))
 caught udf_from_a32

diff --git a/...ndef-exception-t32-armv8r-none-eabihf.out → ...def-exception-t32-armv8r-none-eabihf.snap b/...ndef-exception-t32-armv8r-none-eabihf.out → ...def-exception-t32-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is a undef exception example
 undefined abort occurred Hsr { ec: Ok(Unknown), il: ThirtyTwoBit, iss: 00000000 }, Some(Unknown(IssUnknown(0)))
 caught udf_from_t32

diff --git a/...ef-exception-t32-thumbv8r-none-eabihf.out → ...f-exception-t32-thumbv8r-none-eabihf.snap b/...ef-exception-t32-thumbv8r-none-eabihf.out → ...f-exception-t32-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is a undef exception example
 undefined abort occurred Hsr { ec: Ok(Unknown), il: ThirtyTwoBit, iss: 00000000 }, Some(Unknown(IssUnknown(0)))
 caught udf_from_t32

diff --git a/...ce/abt-exception-a32-armv7a-none-eabi.out → ...abt-exception-a32-armv8r-none-eabihf.snap b/...ce/abt-exception-a32-armv7a-none-eabi.out → ...abt-exception-a32-armv8r-none-eabihf.snap
@@ -1,12 +1,16 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is an data abort exception example
 data abort occurred
 DFSR (Fault Status Register): Dfsr { fnv: false, cm: false, ext: false, wnr: false, status: Ok(AlignmentFault) }
-caught fault on COUNTER
 caught unaligned_from_a32
+caught fault on COUNTER
 Doing it again
 data abort occurred
 DFSR (Fault Status Register): Dfsr { fnv: false, cm: false, ext: false, wnr: false, status: Ok(AlignmentFault) }
-caught fault on COUNTER
 caught unaligned_from_a32
+caught fault on COUNTER
 Skipping instruction
 Recovered from fault OK!
diff --git a/.../abt-exception-a32-armv7a-none-eabihf.out → ...t-exception-a32-thumbv8r-none-eabihf.snap b/.../abt-exception-a32-armv7a-none-eabihf.out → ...t-exception-a32-thumbv8r-none-eabihf.snap
@@ -1,12 +1,16 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is an data abort exception example
 data abort occurred
 DFSR (Fault Status Register): Dfsr { fnv: false, cm: false, ext: false, wnr: false, status: Ok(AlignmentFault) }
-caught fault on COUNTER
 caught unaligned_from_a32
+caught fault on COUNTER
 Doing it again
 data abort occurred
 DFSR (Fault Status Register): Dfsr { fnv: false, cm: false, ext: false, wnr: false, status: Ok(AlignmentFault) }
-caught fault on COUNTER
 caught unaligned_from_a32
+caught fault on COUNTER
 Skipping instruction
 Recovered from fault OK!
diff --git a/...ce/abt-exception-t32-armv7a-none-eabi.out → ...abt-exception-t32-armv8r-none-eabihf.snap b/...ce/abt-exception-t32-armv7a-none-eabi.out → ...abt-exception-t32-armv8r-none-eabihf.snap
@@ -1,12 +1,16 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is an data abort exception example
 data abort occurred
 DFSR (Fault Status Register): Dfsr { fnv: false, cm: false, ext: false, wnr: false, status: Ok(AlignmentFault) }
-caught fault on COUNTER
 caught unaligned_from_t32
+caught fault on COUNTER
 Doing it again
 data abort occurred
 DFSR (Fault Status Register): Dfsr { fnv: false, cm: false, ext: false, wnr: false, status: Ok(AlignmentFault) }
-caught fault on COUNTER
 caught unaligned_from_t32
+caught fault on COUNTER
 Skipping instruction
 Recovered from fault OK!
diff --git a/.../abt-exception-t32-armv7a-none-eabihf.out → ...t-exception-t32-thumbv8r-none-eabihf.snap b/.../abt-exception-t32-armv7a-none-eabihf.out → ...t-exception-t32-thumbv8r-none-eabihf.snap
@@ -1,12 +1,16 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Hello, this is an data abort exception example
 data abort occurred
 DFSR (Fault Status Register): Dfsr { fnv: false, cm: false, ext: false, wnr: false, status: Ok(AlignmentFault) }
-caught fault on COUNTER
 caught unaligned_from_t32
+caught fault on COUNTER
 Doing it again
 data abort occurred
 DFSR (Fault Status Register): Dfsr { fnv: false, cm: false, ext: false, wnr: false, status: Ok(AlignmentFault) }
-caught fault on COUNTER
 caught unaligned_from_t32
+caught fault on COUNTER
 Skipping instruction
 Recovered from fault OK!
diff --git a/...6/reference/c_test-armv8r-none-eabihf.out → ...mps3-an536/c_test-armv8r-none-eabihf.snap b/...6/reference/c_test-armv8r-none-eabihf.out → ...mps3-an536/c_test-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 c_code_char_check(p) -> 2
 c_code_unsigned_char_check(p) -> 2
 c_code_signed_char_check(p) -> 2

diff --git a/...reference/c_test-thumbv8r-none-eabihf.out → ...s3-an536/c_test-thumbv8r-none-eabihf.snap b/...reference/c_test-thumbv8r-none-eabihf.out → ...s3-an536/c_test-thumbv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 c_code_char_check(p) -> 2
 c_code_unsigned_char_check(p) -> 2
 c_code_signed_char_check(p) -> 2

diff --git a/...reference/fpu-test-armv8r-none-eabihf.out → ...s3-an536/fpu-test-armv8r-none-eabihf.snap b/...reference/fpu-test-armv8r-none-eabihf.out → ...s3-an536/fpu-test-armv8r-none-eabihf.snap
@@ -1,3 +1,7 @@
+---
+source: qemu-tests/tests/tests.rs
+expression: stdout
+---
 Sine wave test (f32)...
 ( 0.0000) ..............................o
 ( 0.1253) .................................o