pyverilog

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Here are 4 public repositories matching this topic...

NNgen / nngen

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NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network

python deep-learning neural-network compiler hardware verilog-hdl pyverilog high-level-synthesis onnx veriloggen

Updated Oct 17, 2023
Python

PyHDI / veriloggen

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Veriloggen: A Mixed-Paradigm Hardware Construction Framework

python compiler hardware verilog-hdl pyverilog high-level-synthesis hardware-construction-language

Updated Mar 8, 2026
Python

ranaumarnadeem / OpenTestability

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OpenTestability is an open-source tool for structural analysis of digital circuits, enabling computation of SCOAP metrics, Controllibility Observability Probability (COP), reconvergent path detection, and test point insertion.

open-source distance vlsi cop tpi pyverilog dfts scoap-analysis-tool testpoint

Updated Aug 18, 2026
Python

Sawaiz-zip / agentic-verilog-testbench

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Agentic Verilog testbench generation: a LangGraph multi-agent pipeline that writes HDL testbenches from natural language, catches structural faults with Pyverilog static analysis before simulation, and repairs them from structured feedback. 93% fault detection, measured by fault injection.

static-analysis eda verilog hdl pyverilog hardware-verification llm-agents langgraph agentic-ai testbench-generation

Updated Aug 31, 2026
Python

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