Map L2CFG region to tlb - #85
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Jul 27, 2026
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- Add pinned TLB entry for L2 config
- Refactor getxreg/setxreg to use permanent VA instead of tmpmap
- Add SIZE_*_MASK macros for page offset extraction
- Add pinned TLB entry for L2 config - Refactor getxreg/setxreg to use permanent VA instead of tmpmap - Add SIZE_*_MASK macros for page offset extraction Signed-off-by: Zeev Belinsky <zbelinsk@qti.qualcomm.com>
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July 27, 2026 15:06
Bryan Bayerdorffer (bryanb-h2)
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Jul 27, 2026
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Good overall. Should be ok to merge after requested changes.
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| FROM = cfgbase | ||
| FROM = asl(FROM, #(CFG_TABLE_SHIFT - PHYSREAD_HI_SHIFT)) | ||
| TO = #CFG_TABLE_L2REGS | ||
| TO = memw_phys(TO, FROM) | ||
| TO = asl(TO, #CFG_TABLE_SHIFT) |
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Instead of using FROM and TO here, how about defining CFG_* back to their regs:
#undef SYSCFG
#undef SIG_COUNT
#define CFG_IDX r8
#define CFG_HI r9
and then s/FROM/CFG_HI/g; s/TO/CFG_IDX/g
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Right. Don't know why haven't done that at first.
Done.
| /* Hardware threads this build supports; never start or account beyond it. */ | ||
| #define MAX_HTHREADS_MASK ((1U << MAX_HTHREADS) - 1) | ||
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| #define L2CFG_BASE_VA 0xffb00000 // leaves at most 3M for tmpmap at 0xff800000 |
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Can we put this at 0xffd00000? I think we should leave room to be able to tmpmap a 4M page.
Move L2CFG_BASE_VA to 0xffd00000 and ANGEL_VA to 0xffe00000. Clarify boot.ref.S register names (FROM→CFG_HI, TO→L2_CFG_BASE). Signed-off-by: Zeev Belinsky <zbelinsk@qti.qualcomm.com>
Bryan Bayerdorffer (bryanb-h2)
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Jul 28, 2026
Bryan Bayerdorffer (bryanb-h2)
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✔️ after minor fix
| #define DEVICE_PAGE_SIZE SIZE_1M | ||
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| #define Q6_SS_BASE_VA 0xffc00000 // leaves at most 4M for tmpmap at 0xff800000 | ||
| #define Q6_SS_BASE_VA 0xffc00000 // leaves at most 3M for tmpmap at 0xff800000 |
Signed-off-by: zbelinsk <zbelinsk@qti.qualcomm.com>
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Do we want to merge now, or wait to simulate fast l2vic support? |
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Ok to merge. |
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