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fix(dts): align XiangShan ISA declarations with RVA23 profiles - #53

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rezado wants to merge 2 commits into
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fix-dts-rva23-novec
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fix(dts): align XiangShan ISA declarations with RVA23 profiles#53
rezado wants to merge 2 commits into
mainfrom
fix-dts-rva23-novec

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@rezado

@rezado rezado commented Aug 26, 2026

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Summary

  • add missing RVA23 extensions to XiangShan riscv,isa and
    riscv,isa-extensions properties
  • remove the v extension from all novec legacy ISA strings
  • complete the 16 GiB novec DTS extension list
  • keep the multi-hart DTS generator and checked-in 32-hart DTS consistent

Motivation

The RVA23 novec workload configs require extensions that were not consistently
advertised by every DTS profile. In addition, several novec DTS files still
included v in the legacy riscv,isa property, despite excluding it from
riscv,isa-extensions.

Although OpenSBI prefers riscv,isa-extensions when it is present, the
conflicting legacy property could still mislead consumers that parse only
riscv,isa.

This change makes both ISA properties consistent with the workload profiles and
ensures every novec DTS covers the configured RVA23 MARCH without advertising
vector support.

@rezado
rezado requested a review from poemonsense August 26, 2026 06:46
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